Patents Examined by Rudy Zervignon
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Patent number: 8679255Abstract: A gas supply mechanism includes a gas introduction member having gas inlet portions through which a gas is introduced into a processing chamber, a processing gas supply unit, a processing gas supply path, branch paths, an additional gas supply unit and an additional gas supply path. The gas inlet portions includes inner gas inlet portions for supplying the gas toward a region where a target substrate is positioned in the chamber and an outer gas inlet portion for introducing the gas toward a region outside an outermost periphery of the target substrate. The branch paths are connected to the inner gas inlet portions, and the additional gas supply path is connected to the outer gas inlet portion.Type: GrantFiled: April 26, 2013Date of Patent: March 25, 2014Assignee: Tokyo Electron LimitedInventor: Noriiki Masuda
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Patent number: 6077387Abstract: Method and system for monitoring a plasma etch process performed in a plasma processing chamber, the method and system being capable of accurately monitoring and controlling the plasma etch process without being affected by the change in a plasma light emission transmission characteristically caused by process polymer depositions on a detecting surface or sampling window.Type: GrantFiled: February 10, 1999Date of Patent: June 20, 2000Assignee: STMicroelectronics, Inc.Inventor: Mark R. Tesauro
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Patent number: 6019060Abstract: A cam-based arrangement configured to move a confinement ring along a first axis of a plasma processing chamber. The confinement ring is disposed in a plane that is orthogonal to the first axis. The cam-based arrangement includes a cam ring having a plurality of cam regions formed on a first surface of the cam ring. There is further included a plurality of cam followers in rolling contact with the first surface of the cam ring. There is also included a plurality of plungers oriented parallel to the first axis, each of the plurality of plungers being coupled to one of the plurality of cam followers and to the confinement ring, wherein the plurality of plungers move in an orchestrated manner parallel to the first axis as the cam ring is rotated and the plurality of cam followers stay in the rolling contact with the first surface of the cam ring.Type: GrantFiled: June 24, 1998Date of Patent: February 1, 2000Assignee: Lam Research CorporationInventor: Eric H. Lenz
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Patent number: 5976311Abstract: A semiconductor wafer wet processing device which includes a chamber, a process tank body containing walls and disposed within the chamber, and defining a channel therebetween, at least one of the walls of the process tank body containing a plurality of apertures for providing lateral access between the channel and the interior of the process tank body, a wafer-carrying device disposed within the process tank body, an inlet for introducing a processing liquid into the channel and an outlet for removing the processing liquid from the interior of the process tank body, wherein upon the introduction of the processing liquid through the inlet into the channel, the processing liquid flows over the top of the walls of the process tank body into the interior thereof and laterally through the apertures in the walls of the process tank body for treating the contents thereof and is removed through the outlet.Type: GrantFiled: March 26, 1997Date of Patent: November 2, 1999Assignee: LG Semicon Co., Ltd.Inventor: Suk-Bin Han
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Patent number: 5976395Abstract: A selective etching method for a stacked organic film which is capable of effectively removing an organic anti-reflection layer without a loss of a photoresist film before etching a base layer such as a wafer, etc., by using an organic anti-reflection layer. The method includes the steps of forming a first organic film on a base layer, forming a second organic film on the first organic film, patterning the second organic film, and exposing a predetermined portion of the first organic film, hardening the first organic film and the patterned second organic film, and etching the exposed first organic film and exposing the base layer.Type: GrantFiled: September 15, 1997Date of Patent: November 2, 1999Assignee: LG Semicon Co., Ltd.Inventor: Jae Hee Ha
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Patent number: 5968277Abstract: Described are apparatus and method for providing relief in a center bottom region of each of a plurality of recessed pockets for supporting a semiconductor substrates during epitaxial deposition. In a preferred embodiment, the relief takes the form of a rectilinear recess, or cutout, formed along the bottom periphery of each pocket to change the single-point, tangential contact to a double-point contact that stabilizes the substrate supported thereon and that reduces slip formation characterizing conventional, unrelieved pockets formed in barrel-type reactors such as susceptors. The invention lends itself to design and manufacture of such reactors as well as retrofit of an existing installed base of conventional reactors.Type: GrantFiled: October 10, 1997Date of Patent: October 19, 1999Assignee: SEH America, Inc.Inventors: Trevan Rhett Landin, James Maxwell Stevenson
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Patent number: 5964980Abstract: A processor is provided for an improved semiconductor etching system which generates a series of multi-bit digital output code words. The processor provides an endpoint detector for determining if one of the digital output code word has reached a predetermined endpoint level and for generating a control signal to stop etching of a wafer. The processor further provides a standard endpoint curve corresponding to standard etching of a standard wafer. A normalizer is provided for normalizing the current endpoint curve generated from the series of multi-bit digital code words for a wafer being etched with respect to the standard endpoint curve and for providing a normalized current endpoint curve.Type: GrantFiled: June 23, 1998Date of Patent: October 12, 1999Assignee: VLSI Technology, Inc.Inventor: Christopher T. Robinett
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Patent number: 5948203Abstract: An apparatus for chemical-mechanical-polishing(CMP) is described which employs a dedicated optical film thickness monitor for quasi in-situ assessment of the thickness of a dielectric film on an integrated circuit wafer during CMP operations involving planarization and polish-back. The wafers being polished remain mounted on the CMP wafer carrier and are transported from the polishing platen to the optical film thickness measuring device by an integral mechanical transport assembly which can be operated either manually or automatically by a computer. Real-time polishing rates are determined after each polish/measurement cycle so that time variant polishing rates are redressed.Type: GrantFiled: July 29, 1996Date of Patent: September 7, 1999Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventor: Shih-Ming Wang