Abstract: Data objects of a file are cached in a cache memory of a storage system. An access sequence of the cached data objects is determined based on metadata of the file. In response to a request for cache space reclamation, a data object is evicted from the cache memory whose next access is a farthest amongst the cached data objects based on the access sequence of the data objects.

Abstract: In response to an instruction to dismount a storage volume, for example, an object in the storage volume is identified and a handle that references the object is closed. Once an exclusive lock on the storage volume is acquired, the storage volume can be dismounted. The storage volume can then remounted.

Abstract: A solid state drive (SSD) includes an SSD control module configured to determine frequencies corresponding to how often data stored in respective logical addresses associated with the SSD is updated and form groups of the logical addresses according to the frequencies, and a memory control module configured to rewrite the data to physical addresses in blocks of an SSD storage region based on the groups.

Abstract: A method and apparatus for controlling affinity of subcaches is disclosed. When a core compute unit evicts a line of victim data, a prioritized search for space allocation on available subcaches is executed, in order of proximity between the subcache and the compute unit. The victim data may be injected into an adjacent subcache if space is available. Otherwise, a line may be evicted from the adjacent subcache to make room for the victim data or the victim data may be sent to the next closest subcache. To retrieve data, a core compute unit sends a Tag Lookup Request message directly to the nearest subcache as well as to a cache controller, which controls routing of messages to all of the subcaches. A Tag Lookup Response message is sent back to the cache controller to indicate if the requested data is located in the nearest sub-cache.

Abstract: Disclosed is a method of writing data in a storage device including a nonvolatile memory device. The method includes receiving write data with a write request, detecting a number of free blocks, if the detected number of free blocks is less than a threshold value, allocating a log block only in accordance with a sub-block unit, but if the detected number of free blocks is not less than the threshold value, allocating the log block in accordance with one of the sub-block unit and a physical block unit, wherein the sub-block unit is smaller than the physical block unit.

Abstract: Described are techniques for reconfiguring a storage device. A first plurality of parameters characterizing the storage device at a first point in time are received. The first plurality of parameters includes a first raw capacity and a first published capacity. The first raw capacity represents a physical storage capacity of the storage device. The first published capacity represents a logical storage capacity of the storage device. A second plurality of parameters is determined characterizing the storage device at a subsequent second point in time. The second plurality of parameters includes a second raw capacity and a second published capacity, The storage device is used at the first point in time as a device having the first plurality of parameters and at the second point in time as a device having the second plurality of parameters.

Abstract: One embodiment sets forth a technique for time-multiplexed communication for transmitting command and address information between a controller and a multi-port memory device over a single connection. Command and address information for each port of the multi-port memory device is time-multiplexed within the controller to produce a single stream of commands and addresses for different memory requests. The single stream of commands and addresses is transmitted by the controller to the multi-port memory device where the single stream is demultiplexed to generate separate streams of commands and addresses for each port of the multi-port memory device.

Abstract: A computing system includes a parent partition, child partitions, a hypervisor, shared memories each associated with one of the child partitions, and trigger pages each associated with one of the child partitions. The hypervisor receives a system event signal from one of the child partitions and, in response to receiving the system event signal, accesses the trigger page associated with that child partition. The hypervisor determines whether the trigger page indicates whether data is available to be read from the shared memory associated with the child partition. The hypervisor can send an indication to either the parent partition or the child partitions that data is available to be read from the shared memory associated with the child partition if the hypervisor determines that the trigger page indicates that data is available to be read from the shared memory associated with the child partition.

Abstract: A method to configure a storage library, comprising the steps of establishing a logical configuration for said storage library comprising a plurality of physical objects, by configuring a plurality of logical objects using a plurality of logical configuration commands, and adding that plurality of logical objects to the logical configuration. The method further adds the plurality of logical configuration commands to a Configuration Library, and saves that Configuration Library for later use.

Abstract: According to a method of data processing, a memory controller receives a plurality of data prefetch requests from multiple processor cores in the data processing system, where the plurality of prefetch load requests include a data prefetch request issued by a particular processor core among the multiple processor cores. In response to receipt of the data prefetch request, the memory controller provides a coherency response indicating an excess number of data prefetch requests. In response to the coherency response, the particular processor core reduces a rate of issuance of data prefetch requests.

Abstract: An apparatus, method, and computer program for maintaining access times in a data processing system, wherein the data processing system comprises a plurality of storage devices, the apparatus including: a receive component, for receiving a command or an availability message, wherein an availability message indicates whether the storage device is available; an evaluate component for evaluating a plurality of first relationships between the storage devices and a plurality of first values, wherein each of the first values indicates whether a related storage device is a redundant; a send component, for sending a power message to one or more of the storage devices; and an update component for updating a second relationship between the redundant storage device and a plurality of second values, wherein each of the second values indicates whether a related redundant storage device is available.

Abstract: A computer system that is programmed with virtual memory accesses to physical memory employs multi-bit counters associated with its page table entries. When a page walker visits a page table entry, the multi-bit counter associated with that page table entry is incremented by one. The computer operating system uses the counts in the multi-bit counters of different page table entries to determine where large pages can be deployed effectively. In a virtualized computer system having a nested paging system, multi-bit counters associated with both its primary page table entries and its nested page table entries are used. These multi-bit counters are incremented during nested page walks. Subsequently, the guest operating systems and the virtual machine monitors use the counts in the appropriate multi-bit counters to determine where large pages can be deployed effectively.

Abstract: A memory device may comprise circuitry to adjust between latency and throughput in transferring information through a memory port, wherein the circuitry may be capable of configuring individual partitions or individual sectors as high-throughput storage or low-latency storage.

Abstract: Atomically accumulating memory updates in a computer system configured with an accumulator that is memory mapped. The accumulator includes an accumulator memory and an accumulator queue and is configured to communicatively couple to a processor. Included is receiving from the processor, by the accumulator, an accumulation request. The accumulation request includes an accumulation operation identifier and data. Based on determining, by the accumulator, that the accumulator can immediately process the request, immediately processing the request. Processing the request includes atomically updating a value in the accumulator memory, by the accumulator, based on the operation identifier and data of the accumulation request. Based on determining, by the accumulator, that the accumulator is actively processing another accumulation request, queuing, by the accumulator, the accumulation request for later processing.

Abstract: An apparatus, system, and method are disclosed for efficiently managing commands in a solid-state storage device that includes a solid-state storage arranged in two or more banks. Each bank is separately accessible and includes two or more solid-state storage elements accessed in parallel by a storage input/output bus. The solid-state storage includes solid-state, non-volatile memory. The solid-state storage device includes a bank interleave that directs one or more commands to two or more queues, where the one or more commands are separated by command type into the queues. Each bank includes a set of queues in the bank interleave controller. Each set of queues includes a queue for each command type. The bank interleave controller coordinates among the banks execution of the commands stored in the queues, where a command of a first type executes on one bank while a command of a second type executes on a second bank.

Abstract: An example method includes determining a configuration of two or more partitions for a sequential access medium. At least one partition stores data de-duplication data structures while at least one other partition stores a repository of unique data blocks associated with the data structures. The method also includes controlling a data de-duplication computer to configure the sequential access medium according to the configuration. The method includes producing an output sequence for writing the data structures and a set of unique data blocks associated with the set of data structures to the sequential access medium as configured with the two or more partitions. One embodiment includes controlling a data de-duplication computer to write the data de-duplication data structures and the set of unique data blocks to the sequential access medium according to the output sequence.

Abstract: Various embodiments for autonomic reclamation of data stored on at least one sequential storage media are provided. In one exemplary embodiment, active data is identified, read out, and stored in a sequential order by starting at a beginning block address of the at least one sequential storage media. At least one of a start address, an end address, and a data length of all original blocks of the active data in a backup application is defined. A new start address for each original block of active data to be written to the backup application is generated. A mapping is yielded and sent from the backup application to a sequential storage media device having the at least one sequential storage media, and the active data is read from each original block address in sequential order.

Abstract: A combined memory block includes a first memory unit configured to store data and an additional memory unit that forms a stacked structure with the memory unit, wherein the memory unit and the storage unit together form multi-level cells having variable resistance in storing data.

Abstract: A storage system includes plural types of storage devices that define a plurality of virtual volumes and a plurality of logical volumes. A storage controller is configured to manage the plurality of virtual volumes and the plurality of logical volumes, the plurality of virtual volumes defining first storage areas and the plurality of logical volumes defining second storage areas. A second storage area of the plurality of logical volumes is allocated to a first storage area of the plurality of virtual volumes. The storage controller is configured to determine whether data of a first storage area of a swap file is to be stored in the first tier storage device or the second tier storage device based on access information from an application server that manages a swap file information of the swap file.

Abstract: A transactional memory system salvages hardware lock elision (HLE) transactions. A computer system of the transactional memory system records information about locks elided to begin HLE transactional execution of first and second transactional code regions. The computer system detects a pending cache line conflict of a cache line, and based on the detecting stops execution of the first code region of the first transaction and the second code region of the second transaction. The computer system determines that the first lock and the second lock are different locks and uses the recorded information about locks elided to acquire the first lock of the first transaction and the second lock of the second transaction. The computer system commits speculative state of the first transaction and the second transaction and the computer system continues execution of the first code region and the second code region non-transactionally.