Patents Examined by S Hasan
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Patent number: 10922240Abstract: According to one embodiment, a memory system includes a cache configured to cache a part of a multi-level mapping table for logical-to-physical address translation, and a controller. The multi-level mapping table includes a plurality of hierarchical tables corresponding to a plurality of hierarchical levels. The table of each hierarchical level includes a plurality of address translation data portions. The controller sets a priority for each of the hierarchical level based on a degree of bias of reference for each of the hierarchical level, and preferentially caches each of the address translation data portions of a hierarchical level with a high priority into the cache, over each of the address translation data portions of a hierarchical level with low priority.Type: GrantFiled: March 11, 2019Date of Patent: February 16, 2021Assignee: TOSHIBA MEMORY CORPORATIONInventors: Shohei Onishi, Yoshiki Saito, Yohei Hasegawa, Konosuke Watanabe
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Patent number: 10909042Abstract: Hash-based application programming interface (API) importing can be prevented by allocating a name page and a guard page in memory. The name page and the guard page being associated with (i) an address of names array, (ii) an address of name ordinal array, and (iii) an address of functions array that are all generated by an operating system upon initiation of an application. The name page can then be filled with valid non-zero characters. Thereafter, protections on the guard page can be changed to no access. An entry is inserted into the address of names array pointing to a relative virtual address corresponding to anywhere within the name page. Access to the guard page causes the requesting application to terminate. Related apparatus, systems, techniques and articles are also described.Type: GrantFiled: July 19, 2019Date of Patent: February 2, 2021Assignee: Cylance Inc.Inventor: Jeffrey Tang
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Patent number: 10884630Abstract: A storage system includes a controller and a nonvolatile memory drive, in which the controller transmits a write request that designates a volume identifier of a volume to be provided to a host, to the nonvolatile memory drive; the nonvolatile memory drive exclusively allocates a free block selected from a plurality of blocks to the volume identifier; write data of the write request is written to the free block; when the write data is update write data, an area that stores data to be updated is changed to an invalid data area; and after valid data of a block including the invalid data area is migrated to another block, all data of the block including the invalid data area is erased.Type: GrantFiled: April 13, 2017Date of Patent: January 5, 2021Assignee: Hitachi, Ltd.Inventors: Koji Hosogi, Naoya Okada, Akifumi Suzuki, Hideyuki Koseki, Masahiro Tsuruya
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Patent number: 10884646Abstract: A method, apparatus, system, and computer program product for managing a storage system. Data associated with a set of tags is identified by a computer system using a policy, wherein the policy defines the set of tags for a set of types of data used in a process performed in an organization using data in the storage system. A set of storage tiers for the data associated with the set of tags is determined by the computer system using the policy. The policy defines the set of storage tiers for the data associated with the set of tags when the data associated with the set of tags is used by the process. The data associated with the set of tags is moved by the computer system to the set of storage tiers as determined using the policy.Type: GrantFiled: November 6, 2018Date of Patent: January 5, 2021Assignee: International Business Machines CorporationInventors: Gavin C. O'Reilly, Susheel Gooly, Clea A. Zolotow, Tedrick N. Northway, Derek Lacey
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Patent number: 10877788Abstract: Examples include a processor including fetch circuitry to fetch a guest physical address translation instruction having a format with fields to specify at least an opcode and locations of a source vector and a destination vector, decode circuitry to decode the fetched guest physical address translation instruction, and execution circuitry to execute the decoded guest physical address translation instruction. Execution of the decoded guest physical address translation instruction includes comparing guest physical addresses of the source vector with base and end addresses of a selected memory region, masking a guest physical address of the source vector if the guest physical address is in the selected memory region, translating the masked guest physical addresses into host addresses, and storing the host addresses into the destination vector.Type: GrantFiled: March 12, 2019Date of Patent: December 29, 2020Assignee: Intel CorporationInventors: Fan Zhang, Bruce Richardson
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Patent number: 10860483Abstract: A technique handles metadata corruption to avoid data unavailability. The technique involves performing metadata evaluation operations on metadata describing pages of written data in a data-log that holds data en route to volumes in secondary storage. The technique further involves, while results of the metadata evaluation operations indicate that there is no corrupt metadata, flushing the pages of written data from the data-log to the volumes in the secondary storage. The technique further involves, in response to a result of a particular metadata evaluation operation indicating that metadata for a particular page of written data in the data-log is corrupt, quarantining the particular page of written data from the data-log to a containment cache to enable further flushing of other pages of written data from the data-log to the volumes in the secondary storage.Type: GrantFiled: April 30, 2019Date of Patent: December 8, 2020Assignee: EMC IP Holding Company LLCInventors: Leron Fliess, Nimrod Shani, Ronen Gazit
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Patent number: 10754559Abstract: A first storage system is configured to participate in a replication process with a second storage system using an active-active configuration. A request for a time-to-live (TTL) grant is received in the first storage system from the second storage system. The first storage system computes an estimate of a difference between local times in the respective first and second storage systems, utilizes the computed estimate in the first storage system to determine a TTL expiration time in the local time in the second storage system, and sends the TTL grant with the TTL expiration time to the second storage system in response to the request. The computed estimate of the difference between the local times in the respective first and second storage systems is illustratively utilized in the first storage system to determine a range for the local time in the second storage system.Type: GrantFiled: March 8, 2019Date of Patent: August 25, 2020Assignee: EMC IP Holding Company LLCInventors: David Meiri, Anton Kucherov
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Patent number: 10747667Abstract: An aspect of memory management is provided. An aspect includes evaluating performance parameters of caches of a control module. The caches of the control module have two types of entries: address, hash, and physical location values, and address-to-short-hash (A2SH) values. An aspect further includes evaluating performance parameters of caches of a data module of the multi-layer cache system. The caches of the data module cache include three types of entries: a short-hash-to-physical address, a full-hash-and-short-hash-to-physical address, and a filter mechanism. An aspect further includes predicting an effect that a modification to a size of one of the caches o is on performance of operations at the multi-level cache based on results of the calculating the performance parameters of the caches. Upon estimating an increase in performance, an aspect includes increasing allocation to the cache is determined to have increased performance responsive to the estimating, and decreasing allocation from another cache.Type: GrantFiled: November 2, 2018Date of Patent: August 18, 2020Assignee: EMC IP Holding Company LLCInventors: Assaf Natanzon, Amitai Alkalay, Zvi Schneider
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Patent number: 8849853Abstract: A method of automatically selecting a number of secondary images and a display template for display with a primary preselected image based on analyzing the primary image's attribute information and comparing the secondary images attribute information and the templates image attribute requirements. The attribute information is used to evaluate a compatibility of the images and template so that a best compatibility fit can be obtained when displaying the images.Type: GrantFiled: July 30, 2009Date of Patent: September 30, 2014Assignee: Intellectual Ventures Fund 83 LLCInventors: Raymond W. Ptucha, Laura R. Whitby, William Bogart
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Patent number: 8650208Abstract: An improved approach is described for handling parallelization of window functions, particularly window functions that do not contain partition keys or which has low cardinality for the partition keys. The approach is highly scalable and can be used to greatly improve query processing. A two stage evaluation approach is employed to parallelize the processing of window functions. In the first stage, which is highly parallel, the majority of the computation of window function is done by all available processes. In this way, the entire computing power of the database server is utilized. The second stage, which is serial but is likely to be very short, all processes involved in first stage synchronize and complete the window function evaluation.Type: GrantFiled: July 30, 2010Date of Patent: February 11, 2014Assignee: Oracle International CorporationInventor: Srikanth Bellamkonda
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Patent number: 8577852Abstract: A computer-implemented system assigns retention rules to a plurality of record categories. The system receives information from a system administrator and the organization to which the retention rules are to apply. Initially, an administrator selects business types and functions that apply to the organization. The system uses the business types and functions selections to select from a large set of questions, a subset of questions that pertain to the retention requirements for the organization's records. The organization employees answer the selected questions, and based on these answers the system determines a set of record categories defining the organization's records. The system then selects from a set of retention rules forming a part of the system, the rules that apply to the organization's record categories. The system provides a formalized approval process by the organization for the retention rule assignments to the record categories.Type: GrantFiled: March 23, 2007Date of Patent: November 5, 2013Assignees: Infaxiom Group, LLCInventors: Marsha K. Haagenson, Jeanne B. Caldwell
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Patent number: 8527454Abstract: Techniques are presented for data replication. Two or more nodes are engaged in data replication with one another. When a node acquires a write lock, the write is processed to a local disk associated with the node and communicated to a shared disk. During recovery of a particular node following a failure, the shared disk is accessed to assist in synchronizing that particular node.Type: GrantFiled: August 29, 2007Date of Patent: September 3, 2013Assignee: EMC CorporationInventor: Dhairesh Oza
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Patent number: 8521685Abstract: A method, system, apparatus, and computer-readable medium are described for the background movement of data between nodes in a storage cluster. According to one method, exception tables are generated that include data identifying the areas on each node that need to be migrated to another node and the areas on each node that are to be migrated from another node. The exception tables may be generated in response to the failure of a node in the storage cluster or in other circumstances. A background resynchronization thread utilizes the contents of the exception tables to migrate data between the nodes of the cluster, thereby synchronizing the data stored on the nodes. Input/output operations directed to an area that is to be migrated from another node are redirected to the other node in accordance with a timeout period associated with the input/output operations.Type: GrantFiled: August 29, 2011Date of Patent: August 27, 2013Assignee: American Megatrends, Inc.Inventors: Paresh Chatterjee, Anandh Mahalingam, Narayanan Balakrishnan, Srikumar Subramanian