Patents Examined by Saleha Mohamedulla
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Patent number: 7083879Abstract: A photolithographic mask used for defining a layer in an integrated circuit, or other work piece, where the layer comprises a pattern including a plurality of features to be implemented with phase shifting in phase shift regions is laid out including for patterns comprising high density, small dimension features, and for “full shift” patterns. The method includes identifying cutting areas for phase shift regions based on characteristics of the pattern. Next, the process cuts the phase shift regions in selected ones of the cutting areas to define phase shift windows, and assigns phase values to the phase shift windows. The phase shift values assigned comprise ? and ?, so that destructive interference is caused in transitions between adjacent phase shift windows having respective phase shift values of ? and ?. In the preferred embodiment, ? is equal to approximately ?+180 degrees.Type: GrantFiled: August 17, 2001Date of Patent: August 1, 2006Assignee: Synopsys, Inc.Inventors: Christophe Pierrat, Michel Luc Côté
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Patent number: 7026081Abstract: A photolithography mask for optically transferring a pattern formed in the mask onto a substrate and for negating optical proximity effects. The mask includes a plurality of resolvable features to be printed on the substrate, and at least one non-resolvable optical proximity correction feature, where the non-resolvable optical proximity correction feature is a phase-edge.Type: GrantFiled: May 23, 2002Date of Patent: April 11, 2006Assignee: ASML Masktools B.V.Inventors: Douglas Van Den Broeke, J. Fung Chen
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Patent number: 6924071Abstract: A method for reducing exposure times for high density patterns on a photomask is disclosed. The method includes moving a selected feature located in a cell between a first boundary and a second boundary from a first pattern file to a second pattern file and exposing a resist layer of a photomask blank with the first pattern file by using a step and repeat technique.Type: GrantFiled: November 28, 2001Date of Patent: August 2, 2005Assignee: Toppan Photomasks, Inc.Inventor: Peter Buck
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Patent number: 6924083Abstract: The present invention discloses appropriate layout design of a single mask and proper operation of exposing device in the process of semiconductor production for reducing diffraction effects caused by tiny pattern in exposing process, therefore effectively enhances the resolution in exposing process, and increases the yield.Type: GrantFiled: October 18, 2002Date of Patent: August 2, 2005Assignee: Tai-Saw Technology Co., Ltd.Inventors: Hao-Min Huang, Chen-Tung Huang
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Patent number: 6921613Abstract: The present invention describes an apparatus comprising a mask; a pellicle spacer, the pellicle spacer attached to the mask; and an electrostatic pellicle system, the electrostatic pellicle system attached to the pellicle spacer. The present invention further describes a method of keeping contaminants away from a vicinity of a mask during exposure, the contaminants including an uncharged or neutral particle, a positively-charged particle, or a negatively-charged particle, comprising: inducing a positive or negative charge on the uncharged or neutral particle; attracting the positively-charged particle with a negatively-charged electric field; and attracting the negatively-charged particle with a positively-charged electric field.Type: GrantFiled: March 22, 2004Date of Patent: July 26, 2005Assignee: Intel CorporationInventor: Dan Enloe
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Patent number: 6919150Abstract: A method for forming a mask assembly for use in lithography, typically electron-beam lithography, first forms in a substrate one half of a plurality of opening therethrough and then fills the openings with a removable fill material. Thereafter are formed the other half of the openings which are then filled with the removable fill material. After all the openings have been formed and filled, a support membrane is formed over the substrate and covers the filled windows. A mask layer is then formed over the membrane and patterned. The fill is then removed from all of the windows.Type: GrantFiled: March 3, 2004Date of Patent: July 19, 2005Assignee: Applied Materials, Inc.Inventors: Cheng Guo, Stephen Moffatt
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Patent number: 6919148Abstract: A member for a mask film comprising a substrate film transmitting ultraviolet light and a resin layer not transmitting ultraviolet light which is disposed on one face of the substrate film, allows elimination of color by irradiation with a laser beam, has a transmittance of ultraviolet light of 0.1% or smaller and has a thickness of 0.1 to 30 ?m; a process for producing a mask film using the member; and a process for producing a printing plate of a photosensitive resin using the mask film. The mask is advantageously used for preparing a printing plate such as a photosensitive printing plate. The member for a mask provides the mask film by etching with a laser beam.Type: GrantFiled: January 21, 2003Date of Patent: July 19, 2005Assignee: Lintec CorporationInventors: Masafumi Mitsuhashi, Tomishi Shibano
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Patent number: 6913859Abstract: A process for making the mask can comprise providing a thin transparent material of substantially uniform thickness, forming a pattern of opaque regions on the material according to a first predetermined pattern, and embossing the material according to a second predetermined pattern.Type: GrantFiled: December 15, 2003Date of Patent: July 5, 2005Assignee: The Proctor & Gamble CompanyInventors: Michael Douglas Hill, Paul Dennis Trokhan, Larry Leroy Huston
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Patent number: 6913857Abstract: As shown in FIG. 2, a multi-layer structured exposure mask 1 of this embodiment is provided with a frame 20 made of glass, a silicon plate 15 provided on an under surface of the frame 20, a heat absorption mask 16 provided on an under surface of the silicon plate 15, a silicon plate 11 provided on an under surface of the heat absorption mask 16 and a stencil mask 14 provided on an under surface of the silicon plate 11. The stencil mask 14 is made up of a silicon substrate and is provided with a slit-shaped patterning opening 14a to form a resist pattern. The heat absorption mask 16 is made up of a silicon substrate coated with an SiN film and is provided with slit-shaped openings 16a shaped in almost the same way as the patterning openings 14a of the stencil mask 14. The opening 16a is shaped in such a size that will not block electron beams necessary to form a resist pattern as shown in FIG. 3(a).Type: GrantFiled: December 26, 2001Date of Patent: July 5, 2005Assignees: Matsushita Electric Industrial Co., Ltd., PD Service CorporationInventors: Masaru Sasago, Masayuki Endo, Tokushige Hisatsugu
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Patent number: 6911283Abstract: A method and apparatus for coupling a pellicle to a photomask using a non-distorting mechanism are disclosed. A pellicle is coupled to a photomask with a non-distorting mechanism that is located on a pellicle frame opposite a thin film coupled to the pellicle frame. The non-distorting mechanism acts to reduce stress exerted on the photomask by the pellicle.Type: GrantFiled: February 7, 2002Date of Patent: June 28, 2005Assignee: DuPont Photomasks, Inc.Inventors: Joseph Stephen Gordon, Gregory P. Hughes, Franklin Dean Kalk, Hakki Ufuk Alpay, Glenn E. Storm
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Patent number: 6911301Abstract: The invention encompasses a radiation-patterning tool. The tool is configured to be utilized to print a pair of structures in a radiation-sensitive material. The tool includes two separate and discrete features, with one of the features corresponding to one of the structures of the pair of structures and the other of the two features correspond to the other of the structures. At least one element is between the features. The at least one element is at least partially transparent to radiation passing through the radiation-patterning tool, but does not correspond to a discrete structure printed in the radiation-sensitive material. The element modifies the structures printed from the pair of features. The invention also includes printing methods and methods of forming aligned structures with radiation-sensitive material.Type: GrantFiled: March 24, 2004Date of Patent: June 28, 2005Assignee: Micron Technology, Inc.Inventors: H. Daniel Dulman, William A. Stanton
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Patent number: 6908716Abstract: A method for creating a photomask which includes a layer of hard mask material the inclusion of which improves the uniformity of critical dimensions on the photomask by minimizing the affect of macro and micro loading. The method for producing the photomask of the instant invention includes two etching processes. The first etching process etches the layer of hard mask, and the second etching process etches the anti-reflective material and opaque material.Type: GrantFiled: May 4, 2004Date of Patent: June 21, 2005Assignee: Photronics, Inc.Inventor: David Y. Chan
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Patent number: 6893786Abstract: Methods of correcting for overlay error, wherein the methods account for relative offset across the field of exposures of more than one photolithography projection system, as well as systems to perform the methods and apparatus produced therefrom. The methods include defining at least two zones within a field of a mask having substantially similar overlay error values. The methods further include modifying the coordinates of a feature of the mask in response to a correction for the zone to which the feature is mapped, where the correction corresponds to a nominal overlay error value for that zone.Type: GrantFiled: August 26, 2002Date of Patent: May 17, 2005Assignee: Micron Technology, Inc.Inventor: Bill Baggenstoss
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Patent number: 6887625Abstract: In a mask pattern for a device such as a DRAM including a nearly regular array of isolated features, assist features are positioned so as to make the array more symmetric. Where the isolated features are positioned at most but not all of the points of a regular unit cell, the assist features may be positioned at the points of the unit cell not occupied by the isolated features. The isolated features may represent contact holes.Type: GrantFiled: July 16, 2001Date of Patent: May 3, 2005Assignee: ASML Netherlands B.V.Inventors: Johannes Jacobus Matheus Baselmans, Markus Schluter, Donis George Flagello, Robert John Socha
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Patent number: 6884549Abstract: The invention concerns a method for photographic recording a spatial distribution of linear and/or non-linear optical properties in a polymer material which consists in irradiating the material to modify the orientation of its molecules. The irradiation direction is perpendicular or oblique relative to the propagation direction(s) of the scanning beams.Type: GrantFiled: January 21, 2000Date of Patent: April 26, 2005Assignee: France TelecomInventors: Jôseph Zyss, Sophie Brasselet, Eric Toussaere
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Patent number: 6869733Abstract: The present invention is a method of protecting reticles from electrostatic damage during their use in manufacturing lines and while patterning photoresist films on device substrates. An anti-static layer comprised of an ammonium salt is formed on both sides of a pellicle which is then attached to a metal frame that has been coated with an anti-static layer of the ammonium salt. The frame with attached pellicle is connected to a reticle by an adhesive. Any electrostatic charges that form on the surface of the anti-static layers or on the reticle are conducted into the metal frame where they are dissipated. The ammonium salt is preferably (RN4+) Cl— in which (RN4+) has the structure: where Y is an alkyl group or C6H4, m=1 to 10000, and X? is Cl?.Type: GrantFiled: September 30, 2002Date of Patent: March 22, 2005Assignee: Taiwan Semiconductor Manufacturing CompanyInventor: Wei-Yu Su
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Patent number: 6869738Abstract: The main mask pattern of a photomask is corrected by adding serifs of one type (inner or outer) to a pair of mutually adjacent corners in the pattern, and adding a serif of the opposite type (outer or inner) to the edge between the corners. When the photomask is used to create a resist pattern by photolithography in the fabrication of a semiconductor device, the serifs combine to produce an optical proximity correction that reduces corner rounding and increases edge straightness in the resist pattern.Type: GrantFiled: November 27, 2002Date of Patent: March 22, 2005Assignee: Oki Electric Industry Co., Ltd.Inventors: Katsuo Oshima, Koki Muto
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Patent number: 6869751Abstract: A manufacturing method for a metal electrode used for a bus electrode, a data electrode, and the like which make up a display panel including a PDP (Plasma Display Panel) by which, when these electrodes are patterned according to a photolithographic method, the edge curl phenomenon can be substantially controlled to the extent that the phenomenon is negligible. The manufacturing method of the invention therefore includes a dry step for drying the layers making up the metal electrode so that flows (F1, F2, and F3) of the solvent occur from a region having a high absorbency of the solvent to a region having a lower absorbency of the solvent.Type: GrantFiled: October 18, 2000Date of Patent: March 22, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hideki Asida, Shinya Fujiwara, Hideki Marunaka, Tadashi Nakagawa, Keisuke Sumida, Hideaki Yasui, Kazuhiko Sugimoto, Hiroyosi Tanaka
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Patent number: 6866971Abstract: A full phase shifting mask (FPSM) can be advantageously used in a damascene process for hard-to-etch metal layers. Because the FPSM can be used with a positive photoresist, features on an original layout can be replaced with shifters on a FPSM layout. Adjacent shifters should be of opposite phase, e.g. 0 and 180 degrees. In one embodiment, a dark field trim mask can be used with the FPSM. The trim mask can include cuts that correspond to cuts on the FPSM. Cuts on the FPSM can be made to resolve phase conflicts between proximate shifters. In one case, exposing two proximate shifters on the FPSM and a corresponding cut on the trim mask can form a feature in the metal layer. The FPSM and/or the trim mask can include proximity corrections to further improve printing resolution.Type: GrantFiled: November 14, 2002Date of Patent: March 15, 2005Assignee: Synopsys, Inc.Inventor: Christophe Pierrat
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Patent number: 6861182Abstract: Employing a tri-tone attenuated phase shift trim mask in the second exposure of a double exposure alternating phase shift mask (alt-PSM) process is disclosed. A semiconductor wafer is first exposed utilizing a dark field alt-PSM, and then secondly is exposed utilizing a tri-tone attenuated PSM. The tri-tone attenuated PSM may include a transparent substrate, such as quartz, an opaque layer, such as chrome, and an attenuated layer, such as 6% transparency molybdenum silicide (MoSi). The opaque layer has a pattern corresponding to polysilicon gates to be imprinted on the semiconductor wafer, to protect the polysilicon photoresist patterns. The attenuated layer includes assist features to protect forbidden pitch semi-isolated field polysilicon patterns and isolated field polysilicon patterns to be imprinted on the semiconductor wafer.Type: GrantFiled: October 17, 2002Date of Patent: March 1, 2005Assignee: Taiwan Semiconductor Manufacturing Co., LtdInventor: Chung-Hsing Chang