Patents Examined by Sam Chen
  • Patent number: 8108633
    Abstract: A method and an apparatus that allocate a stream memory and/or a local memory for a variable in an executable loaded from a host processor to the compute processor according to whether a compute processor supports a storage capability are described. The compute processor may be a graphics processing unit (GPU) or a central processing unit (CPU). Alternatively, an application running in a host processor configures storage capabilities in a compute processor, such as CPU or GPU, to determine a memory location for accessing a variable in an executable executed by a plurality of threads in the compute processor. The configuration and allocation are based on API calls in the host processor.
    Type: Grant
    Filed: May 3, 2007
    Date of Patent: January 31, 2012
    Assignee: Apple Inc.
    Inventors: Aaftab Munshi, Jeremy Sandmel
  • Patent number: 7979641
    Abstract: The embodiments of the invention provide a method, apparatus, etc. for a cache arrangement for improving RAID I/O operations. More specifically, a method begins by partitioning a data object into a plurality of data blocks and creating one or more parity data blocks from the data object. Next, the data blocks and the parity data blocks are stored within storage nodes. Following this, the method caches data blocks within a partitioned cache, wherein the partitioned cache includes a plurality of cache partitions. The cache partitions are located within the storage nodes, wherein each cache partition is smaller than the data object. Moreover, the caching within the partitioned cache only caches data blocks in parity storage nodes, wherein the parity storage nodes comprise a parity storage field. Thus, caching within the partitioned cache avoids caching data blocks within storage nodes lacking the parity storage field.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: July 12, 2011
    Assignee: International Business Machines Corporation
    Inventors: Dingshan He, Deepak R. Kenchammana-Hosekote
  • Patent number: 7945743
    Abstract: A system and method for dynamic storage based on performance throttling. The method comprises providing an array of storage devices coupled to a computing device. The method comprises determining a status of a system condition, such as ambient temperature. The method comprises throttling the operating speed of one or more storage devices in the array based on the status of the system condition. The method comprises determining relative frequency of access to data to be stored by the computing device in the array of storage devices. The method comprises optimizing storage of data by the computing device in the array of storage devices based at least in part on 1) relative frequency of access to data and 2) which of the one or more storage devices are throttled.
    Type: Grant
    Filed: April 30, 2007
    Date of Patent: May 17, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Christian L. Belady
  • Patent number: 7904676
    Abstract: A method and system for operating a computer system are disclosed. In at least some embodiments, the present invention relates to a method of operating a computer system that includes operating a first cell of the system in accordance with a first memory access configuration, and migrating a first attribute of a first core of the first cell to a second cell of the system. The method additionally includes configuring a portion of the first cell so that the first cell is capable of operating in accordance with a second memory access configuration, and migrating at least one of the first attribute and a second attribute from the second cell back to the first core of the first cell, whereby subsequently the first cell operates in the second mode of operation. In at least some embodiments, the first and second configurations are direct and agent access memory configurations, or vice-versa.
    Type: Grant
    Filed: April 30, 2007
    Date of Patent: March 8, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Bryan Hornung, Mark Shaw
  • Patent number: 7853770
    Abstract: There is a need to improve access speed for a file in a storage system that is provided with multiple storage units having different access speeds.
    Type: Grant
    Filed: May 7, 2007
    Date of Patent: December 14, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Sachie Tajima, Ryoichi Ueda
  • Patent number: 7849281
    Abstract: The invention is for a method of mapping hierarchical volume permission to top level permissions in a layered volume graph of a virtual data storage system with hierarchy of storage volumes requiring permission at every volume level and the top level volume exposed to the hosts via intelligent switches comprising: applying volume level permissions on a volume of the volume graph and mapping condensed permission hierarchically for the entire volume graph to the top level volume from said individual volume level permission.
    Type: Grant
    Filed: March 13, 2007
    Date of Patent: December 7, 2010
    Assignee: EMC Corporation
    Inventors: Sumeet Malhotra, Swati Gupta, Girish B. K. Kumar
  • Patent number: 7725646
    Abstract: A method of using a FLASH memory for a circular buffer, and the FLASH memory for same, the method including one or more of the following steps in various exemplary embodiments: providing a circular buffer having a plurality of sectors; designating a byte of each of the plurality of sectors of the circular buffer as a binary state indicator; saving data sequentially in the circular buffer; and cycling through a plurality of sectors of the binary state indicators, such as empty or erase, last, middle and first, as the data is sequentially saved in the circular buffer.
    Type: Grant
    Filed: August 2, 2007
    Date of Patent: May 25, 2010
    Assignee: Alcatel Lucent
    Inventors: Andrew Molotchko, Dave Graham, Joe Cote
  • Patent number: 7702853
    Abstract: Disclosed are a redundant data storage system (e.g., a RAID system) and a method of operating such a redundant data storage system that provides significant power savings with minimal reduction in reliability. The system and method allow up to half of the memory devices in any of the memory arrays in the system to be placed in standby without significantly impacting the read accesses. The system and method further designate reserved areas in the active memory devices as write-journals, which have at least the same level of protection as the main arrays. The write-journals allow data to be written without powering up a standby memory device. Thus, power consumption is minimized without impacting reliability.
    Type: Grant
    Filed: May 4, 2007
    Date of Patent: April 20, 2010
    Assignee: International Business Machines Corporation
    Inventors: Steven R. Hetzler, Daniel F. Smith
  • Patent number: 7689762
    Abstract: A reference memory location can be designated in a memory device. A memory location can be designated in response to storing data in the memory device. If the identified memory location is associated with the reference memory location then an allocated memory location can be designated relative to the reference memory location, and the allocated memory location can be leveled.
    Type: Grant
    Filed: May 3, 2007
    Date of Patent: March 30, 2010
    Assignee: ATMEL Corporation
    Inventor: Russell Hobson