Abstract: A method for providing secure access to console functions of a computer system and authentication of a console device is disclosed. The method comprises first initiating a first EKE sequence to generate a unique shared secret per device utilizing a default device identifier and associated default shared secret on a system-attached device from which a console operation is desired to be enabled. Then, a shared secret is generated from the first EKE sequence, and the generated shared secret is utilized in place of the default device shared secret in subsequent console authentication procedures for that device. Following, the shared secret is securely stored within a storage location of the system and on the system-attached device. The device's shared secret is subsequently replaced on each connection from that device.

Abstract: A first-key signal representative of a first key is generated from first-key base information being a base of the first key. Contents information is encrypted into encryption-resultant contents information in response to the first-key signal. A second-key signal representative of a second key is generated on the basis of initial-value information of a given initial value according to a predetermined key generation algorithm. The first-key base information is encrypted into encryption-resultant first-key base information in response to the second-key signal. The encryption-resultant contents information, the encryption-resultant first-key base information, the initial-value information, and algorithm identification information for identifying the predetermined key generation algorithm are transmitted or recorded.

Abstract: A cryptographic accelerator (1) has a host interface (2) for interfacing with a host sending cryptographic requests and receiving results. A CPU (3) manages the internal logical unit in an exponentiation sub-system (7) having modulator exponentiators (30). The exponentiators (30) are chained together up to a maximum of four, in a block (20). There are ten blocks (20). A scheduler uses control registers and an input buffer to perform the scheduling control.