Patents Examined by Samuel Bebremariam
  • Patent number: 7061090
    Abstract: A semiconductor device comprises a semi-conductor chip bonded on a top surface inside a case electrode by a bonding material and a lead electrode bonded on a top surface of the semiconductor chip by a bonding material with a space of the case electrode filled with an insulating material for sealing the bonded sections, wherein a groove is provided on a top surface of the case electrode from an edge of the semiconductor chip, to thereby reduce heat distortion which is generated on a large scale at an end of the bonding material on account of a difference in coefficients of linear thermal expansion between the semiconductor chip and the case electrode and improve the thermal fatigue life.
    Type: Grant
    Filed: March 7, 2003
    Date of Patent: June 13, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Misuk Yamazaki, Tatsuo Yamazaki