Abstract: A power transistor structure (10) is formed on an n+ substrate (12). A p- epitaxial layer (16) is formed on the substrate (12) and has an upper surface (19). An n+ source region (26) extends from the upper surface (19) into the epitaxial layer (16). An n-type drain region (22, 24) is spaced from the source region (26) and extends from the upper surface (19) through the epitaxial layer (16) to the substrate (12). An insulating layer (28) on the upper surface (19) extends between the source region (26) and the drain region (22, 24). A conductive gate electrode (34) on the insulating layer (28) extends between the source region (26) and the drain region (22, 24). A conductive electrode (30) is electrically connected to the source region (26). Another conductive electrode (36) is electrically connected to the substrate (12).
Type:
Grant
Filed:
May 22, 1989
Date of Patent:
September 11, 1990
Assignee:
Siliconix Incorporated
Inventors:
Richard A. Blanchard, Richard K. Williams
Abstract: Semiconductor layers having a p-n junction are formed over the surface of a semiconductor substrate except for a partial surface. On the partial surface of the semiconductor substrate, a region of an electrode to be connected with an external terminal is formed with an insulating film interposed between the same. Bonding connection with the external terminal is performed on the region for connection, to reduce mechanical damage of the semiconductor layers having the p-n junction while improving photoelectric conversion efficiency and reliability of the device.
Abstract: A high-frequency transistor having a substrate of a first conductivity type, an epitaxial collector layer of the first conductivity type, a layer-shaped base region of the second opposite conductivity type, which is provided in the collector layer and is subdivided by a sunken oxide pattern into a number of base zones which are interconnected by conducting layers located on the oxide pattern, and at least one emitter zone of the first conductivity type in each base zone. According to the invention, the conducting layers consist of poly-crystalline silicon of which an edge is covered with a thin oxide layer which extends into the base zone and laterally bounds the emitter zones.