Patents Examined by Sarai Butler
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Patent number: 9552263Abstract: A method for dynamically changing system recovery actions based on system load. The method includes measuring a value of a workload characteristic of a computer system over a period of time, detecting an error in the computer system, determining a workload level of the computer system, and selecting a set of error recovery actions in response to the system workload analysis module determining the workload level of the computer system. A workload characteristic defines a type of work performed by the computer system. A workload level can be based on user defined parameters or a measurement of the value of one or more workload characteristics.Type: GrantFiled: August 12, 2014Date of Patent: January 24, 2017Assignee: International Business Machines CorporationInventors: Herve G. P. Andre, Mark E. Hack, Larry Juarez, Todd C. Sorenson
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Patent number: 9552211Abstract: Performing a hot-swap of a storage device for a node in a virtualization environment having a plurality of storage devices, includes performing pass-thru of a storage manager managing the plurality of storage devices to a service virtual machine, such that the service virtual machine communicates with the plurality of storage devices without going through a storage software layer of its corresponding hypervisor, booting the hypervisor from a device other than the plurality of storage devices and performing the hot-swap of the storage device.Type: GrantFiled: December 30, 2013Date of Patent: January 24, 2017Assignee: Nutanix, Inc.Inventors: Miao Cui, Binny Sher Gill
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Patent number: 9547550Abstract: Systems and method provide for the writing of a data block and corresponding metadata block to a storage location. Metadata and data block are encoded separately. The metadata and data block may be moved to a different location due to garbage collection, defragmentation, or some other prompt. The metadata is decoded, modified, re-encoded and written to the different location whereas the data block can be written to the new location without re-encoding.Type: GrantFiled: July 7, 2015Date of Patent: January 17, 2017Assignee: Tidal Systems, Inc.Inventors: Priyanka Thakore, Meng Kun Lee
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Patent number: 9547557Abstract: A peripheral bus error containment and recovery system enables a bus device to experience a fatal bus error and recover without stopping execution of an operating system. When a fatal bus error is detected at the bus device, a bus controller may deactivate a data link layer for a downstream port populated by the bus device, causing an operating system device driver to be uninstalled for the bus device. Then, the operating system device driver may be reinstalled without physically removing the bus device.Type: GrantFiled: November 10, 2014Date of Patent: January 17, 2017Assignee: Dell Products L.P.Inventor: Austin P. Bolen
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Patent number: 9541978Abstract: A mass data storage system includes a redundancy manager that uses a physical position map to select a subset of storage resources having a physical distribution satisfying at least one resource distribution rule. The physical position map identifies physical positions of storage resources relative to a number of power supply units. A read/write manager writes data redundancies to select storage resources of the selected subset to provide a predetermined level of data protection that allows for reconstruction of lost data in a number of diverse circumstances.Type: GrantFiled: May 22, 2015Date of Patent: January 10, 2017Assignee: SEAGATE TECHNOLOGY LLCInventor: Guy David Frick
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Patent number: 9535816Abstract: For remote diagnostics of a computing device, a method is disclosed that includes collecting failure information from a computing device, wherein the computing device has an error, encapsulating the failure information into a file, and transmitting the file from the computing device to a remote device using a low level file transfer protocol.Type: GrantFiled: December 30, 2013Date of Patent: January 3, 2017Assignee: Lenovo (Singapore)Inventors: Bryan L. Young, Nathan J. Peterson, Marc Richard Pamley
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Patent number: 9535791Abstract: There is provided a storage control device that is communicably connected to a plurality of storage devices and a plurality of spare storage devices through a plurality of paths. The storage control device includes: a memory configured to store path information associating the plurality of spare storage devices and the plurality of paths with each other; and a selection unit configured to select a spare storage device that is a replacing apparatus from among the plurality of spare storage devices based on a path connection condition determined in accordance with a path in which the storage device that is a replacement target among the plurality of storage devices is connected and the path information.Type: GrantFiled: October 28, 2014Date of Patent: January 3, 2017Assignee: FUJITSU LIMITEDInventors: Yoshihito Konta, Norihide Kubota, Kenji Kobayashi
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Patent number: 9535782Abstract: Techniques and mechanisms for providing error detection and correction for a platform comprising a memory including one or more spare memory segments. In an embodiment, a memory controller performs first scrubbing operations including detection for errors in a plurality of currently active memory segments. Additional patrol scrubbing is performed for one or more memory segments while the memory segments are each available for activation as a replacement memory segment. In another embodiment, a first handler process (but not a second handler process) is signaled if an uncorrectable error event is detected based on the active segment scrubbing, whereas the second handler process (but not the first handler process) is signaled if an uncorrectable error event is detected based on the spare segment scrubbing. Of the first handler process and the second handler process, only signaling of the first handler process results in a crash event of the platform.Type: GrantFiled: April 16, 2014Date of Patent: January 3, 2017Assignee: Intel CorporationInventors: Anil Agrawal, Satish Muthiyalu, Yingwen Chen, Meera Ganesan
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Patent number: 9535802Abstract: A method of data replica recovery that is based on separate storage drives connected to a network where each storage drive has a storage space divided to contiguous storage segments and is electronically connected to a memory support component via a connection. Pairs of replicas, each of one of a plurality of data units, are stored in a manner that allows, in response to detection of a storage failure in one storage drive, to create replacement replicas in the memory support components of the other storage drives to assure that two replicas of each data unit can be found in the storage system.Type: GrantFiled: January 30, 2014Date of Patent: January 3, 2017Assignee: Technion Research & Development Foundation LimitedInventors: Dan Tsafrir, Eitan Rosenfeld
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Patent number: 9529656Abstract: A computer recovery method for a computer system, the computer system having: a management computer having a processor and a memory; and a computer having a processor, a memory, and a monitoring part for notifying, when an abnormality occurs, the management computer of the abnormality, the management computer being configured to instruct recovery from the abnormality, the computer recovery method having: a first step of obtaining, by the management computer, hardware components and software components of the computer as configuration information; a second step of receiving, by the management computer, notification of an abnormality from the monitoring part of the computer; and a third step of generating, by the management computer, after the notification is received, component string information for identifying a component where the abnormality has occurred from the configuration information.Type: GrantFiled: June 22, 2012Date of Patent: December 27, 2016Assignee: Hitachi, Ltd.Inventors: Yujiro Ichikawa, Yoshifumi Takamoto, Takashi Tameshige, Masaaki Iwasaki, Masayasu Asano
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Patent number: 9529653Abstract: Processor register protection management is disclosed. In embodiments, a method of processor register protection management can include determining a sensitive logical register for executable code generated by a compiler, generating an error-correction table identifying the sensitive logical register, and storing the error-correction table in a memory accessible by a processor. The processor can be configured to generate a duplicate register of the sensitive logical register identified by the error-correction table.Type: GrantFiled: October 9, 2014Date of Patent: December 27, 2016Assignee: International Business Machines CorporationInventors: Pradip Bose, Chen-Yong Cher, Meeta S. Gupta
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Patent number: 9529702Abstract: An adapter can execute a test script in parallel relative to separate tenant installations in a multi-tenant environment. Such tenant installations can be established within a cloud computing environment. Multiple tenant installations may share some installation components, such as an application server and/or a database, so that these shared installation components are not duplicated. While executing the test script in parallel, the adapter can translate selected values for each test script execution so that those values are distinguished from corresponding values within other test script executions. The values can be translated to reflect the identity of the tenant whose installation the test script execution targets. Furthermore, while executing the test scripts in parallel, the adapter can cause the test script executions to synchronize at specified points within the test script, so that all of the test script executions are guaranteed to have executed to a common point before proceeding.Type: GrantFiled: January 13, 2015Date of Patent: December 27, 2016Assignee: Oracle International CorporationInventors: Ronald van Grinsven, Nagarajender Rao Katoori, Mahesh Bansal, Namita Varma, Shailesh Jain Vinayaka, John Richard Smiljanic, Michael John De Groot
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Patent number: 9529677Abstract: Provided are a method and a system for removing a fault applied for an M2M gateway. The method includes: receiving, by an M2M gateway, an automatic code matching command, wherein the automatic code matching command is sent when a communication fault is detected by a sensor; and performing, by the M2M gateway, code matching identification according to the received automatic code matching command, and adding the sensor in a sensor management component of the M2M gateway if code matching is performed successfully. According to the method and the system for removing a fault applied for an M2M gateway according to the disclosure, automatic fault removing between an M2M gateway and a sensor can be realized, and using of the M2M gateway can be recovered.Type: GrantFiled: September 16, 2013Date of Patent: December 27, 2016Assignee: ZTE CORPORATIONInventor: Qianpeng Luo
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Patent number: 9524223Abstract: Identifying an inter-relationship between performance metrics of a computer system. It is proposed to convert performance metric signals, which represent variations of performance metrics over time, into quantized signals having a set of allowable discrete values. The quantized signals are compared to detect a correlation based on the timing of variations quantized signals. An inter-relationship between the performance metrics may then be identified based on a detected correlation between the quantized signals.Type: GrantFiled: August 11, 2014Date of Patent: December 20, 2016Assignee: International Business Machines CorporationInventors: Anthony T. Brew, Laura Flores Sánchez, Paul J. Murphy, Michele Palmia, Anthony W. Ward
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Patent number: 9521194Abstract: A technology is described for providing a nondeterministic value to computing instances executing an application as part of a high availability system. An example method may include receiving a request for a nondeterministic value at a physical host that hosts a first computing instance, where the request may be for an application executing on the first computing instance. A nondeterministic value may be obtained from a nondeterministic value source located on the physical host and provided to the application executing on the first computing instance. A second request from a second computing instance may be received at the physical host, where the second request may be associated with a copy of the application executing on the second computing instance. The nondeterministic value may then be identified in the computer memory of the physical host and provided to the second computing instance over a computer network.Type: GrantFiled: March 16, 2015Date of Patent: December 13, 2016Assignee: Amazon Technologies, Inc.Inventor: Jacob Adam Gabrielson
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Patent number: 9519542Abstract: A storage control apparatus includes a controller to, when more storage devices, among a plurality of storage devices across which a plurality of information areas storing information representing redundant data and one or more spare areas are distributed, than the number of the spare areas fail, perform a rebuild process of information stored in a plurality of information areas of a failed first storage device included in the plurality of combinations of the plurality of information areas and the one or more spare areas, the rebuild process including restoring information corresponding to one information area of the failed first storage device included in one combination among the plurality of combinations, and determining a write destination storage device to which the restored information is to be written in accordance with the number of times information is read from a non-failed second storage device.Type: GrantFiled: July 7, 2015Date of Patent: December 13, 2016Assignee: FUJITSU LIMITEDInventors: Guangyu Zhou, Takeshi Watanabe, Kazuhiko Ikeuchi, Chikashi Maeda, Yukari Tsuchiyama, Kazuhiro Urata
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Patent number: 9519544Abstract: A memory module includes an emergency power supply block, a volatile memory, a nonvolatile memory, and a control block configured to control data of the volatile memory to be backed up in the nonvolatile memory, by using a power supplied from the emergency power supply block, upon a power failure, and control the data of the volatile memory to be recovered, by using data backed up in the nonvolatile memory, upon a power recovery, wherein the control block controls the data of the volatile memory not to be backed up while controlling the data of the volatile memory to be recovered, even upon the power failure.Type: GrantFiled: September 17, 2014Date of Patent: December 13, 2016Assignee: SK Hynix Inc.Inventor: Choung-Ki Song
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Patent number: 9519537Abstract: The present disclosure relates to a log data processing apparatus and a method for controlling the same. A log data processing apparatus according to an embodiment includes a communication unit configured to receive information on log data corresponding to an application from a device for generating the log data, a control unit configured to generate a log message on a basis of the log data information, and a storage unit configured to store the log message and generation history information of the log message generated, wherein the log data information includes a log message parameter, message code information, and identifier information of the application.Type: GrantFiled: April 8, 2015Date of Patent: December 13, 2016Assignee: LSIS CO., LTD.Inventors: Tae Ho Kim, Yong Ik Lee, Jong Ho Park
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Patent number: 9519611Abstract: Methods and hardware data structures are provided for tracking ordered transactions in a multi-transactional hardware design using a counter and an indexed table. The data structure includes a counter that keeps track of the number of in-flight transactions; a table that keeps track of the age of each of the in-flight transactions using the counter; and control logic that verifies a transaction response has been received in the correct order (e.g. corresponds to the oldest in-flight transaction) based on the age information in the table.Type: GrantFiled: August 21, 2015Date of Patent: December 13, 2016Assignee: Imagination Technologies LimitedInventor: Ashish Darbari
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Patent number: 9514032Abstract: Receive output dynamically generated by a running program and check that output for spelling, grammar, and/or other usage errors, providing notice to a user of any errors found. The dynamically generated output includes an assembly of component parts not statically assigned in a predetermined configuration or with predetermined content, but rather generated and/or configured by the executing program as it runs.Type: GrantFiled: September 23, 2014Date of Patent: December 6, 2016Assignee: International Business Machines CorporationInventors: Amit Bareket, Daniel Lereya, Tamir Riechberg, Moshe Weiss