Patents Examined by Satcy A. Whitmore
  • Patent number: 6915501
    Abstract: Some embodiments provide an LP method that identities routes. In some embodiments, this method is used by a router that defines routes for nets within a region of a design layout. Each net has a set of pins in the region. The method partitions the region into a set or sub-regions. For each particular net, the method identifies a set or route. Each route for a net traverses the sub-regions that contain the net's pins. Each route includes a set of route edge, and each route edge connects two sub-regions. Also, some of the identified routes have route edges that are at least partially diagonal. The method formulates a linear-programming (“LP”) problem based on the identified sets of routes for the nets. The method then solves the LP problem to identify one route for each net. In some embodiments, the formulated LP problem is an integer-linear-programming (“ILP”) problem, and solving the ILP problem returns integer solutions that specify one route for each net.
    Type: Grant
    Filed: January 5, 2002
    Date of Patent: July 5, 2005
    Assignee: Cadence Design Systems, Inc.
    Inventors: Steven Teig, Oscar Buset
  • Patent number: 6735751
    Abstract: A false path detecting method includes (a)˜(e) steps. In the (a) step, a data flow occurrence condition that a net becomes active is provided. In the (b) step, one of said plurality of nets as a selected net is selected. In the (c) step, a net connected to an input side or an output side of an element connected to an input side or an output side of said selected net of said plurality of nets is selected as a first specific net. In the (d) step, said first specific net is added to said selected net to generate a first specific path. In the (e) step, whether or not said first specific path is a false path is judged based on said data flow occurrence condition of said selected net and said data flow occurrence condition of said first specific net.
    Type: Grant
    Filed: May 15, 2002
    Date of Patent: May 11, 2004
    Assignee: NEC Electronics Corporation
    Inventor: Shinya Furusawa