Abstract: A sense amplifier in a semiconductor memory device includes a detection unit for generating complementary state signals showing a state of a pair of bit lines coupled to a plurality of memory cells in the semiconductor memory device in which word lines are coupled to the memory cells, and a latch circuit for receiving the complementary signals and a reference signal and for inverting states of complementary output signals of the latch means only when one of the complementary state signals decreases and becomes lower than the reference voltage.

Abstract: An offset address field in a magnetic disc storage system which uses a dual gap head and a rotary actuator. The dual gap head has two gaps, one for reading information and the other for writing information. Prior to a write operation, an address field which precedes a data field is read. The rotary actuator introduces a skew angle between the head and a data track. The skew angle causes the two gaps to travel along different radii of the storage disc. A read address field is aligned with the data field and a write address field is offset from the data field. Prior to writing data on the disc surface, the head is offset so that the write address field is read. Since the write address field is offset, a write operation can proceed without any further offset to the magnetic head.

Abstract: A semiconductor integrated circuit of this invention includes an oscillation circuit formed on a semiconductor substrate, a frequency dividing circuit formed on the semiconductor substrate, for dividing a frequency of an oscillation output from the oscillation circuit, clocked inverters for selectively permitting one of an original oscillation frequency signal of the oscillation circuit and outputs of the frequency dividing circuit to pass therethrough, an output circuit for outputting a signal selected by the cocked inverters, and a frequency dividing circuit controlling NAND circuit for interrupting the operation of the frequency dividing circuit while the original oscillation frequency signal of the oscillation circuit is being output from the output circuit.

Abstract: A signal converter includes a frequency-to-voltage converter for converting a frequency of an input signal received via an input terminal into a control voltage. The input signal contains a noise signal having a frequency different from the frequency of the input signal. The control voltage changes in accordance with a change of the frequency of the input signal. A filter has a variable cutoff frequency so that the noise signal is eliminated from the input signal and outputs a filtered signal. The variable cutoff frequency is changed in accordance with a change of the control voltage so that a change of the variable cutoff frequency follows a change of the frequency of the input signal. A comparator compares the filtered signal with a reference voltage and converts the filtered signal into a pulse signal having a pulse width corresponding to the frequency of the input signal.

Abstract: An apparatus for generating digital gating signals respectively on an N-channel and a P-channel drive line in response to a digital data signal comprising a first and a second digital switching device, a resistive device, and first and second threshold devices for generating digital signals when receiving an input signal which exceeds a preestablished threshold value. The first and second digital switching devices commonly receive the data signal at their respective gates. The first digital switching device is operatively connected between a voltage source and the resistive device and generates a first gating signal from a juncture intermediate the first digital switching device and the resistive device. The second digital switching device is operatively connected between the resistive device and ground and generates a second gating signal from a juncture intermediate the resistive device and the second digital switching device.