Patents Examined by Scott Hawranek
  • Patent number: 6399454
    Abstract: In a method of manufacturing a semiconductor film, nickel elements are first held as indicated by 103 on the surface of an amorphous silicon film 102. Then a crystalline silicon film 104 is obtained by a heat treatment. At this time, the crystallization is remarkably improved by the action of the nickel elements. During this crystallization, nickel elements are diffused in a film. Then a thermal oxide film 105 is formed as a barrier film, and a silicon film 106 containing a high concentration of phosphorus is formed. By carrying out a heat treatment, the nickel elements in the crystalline silicon film 104 are transferred into the silicon film 106. In this way, the concentration of nickel in the crystalline silicon film 104 is lowered.
    Type: Grant
    Filed: July 13, 1998
    Date of Patent: June 4, 2002
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 6387827
    Abstract: A method of growing a silicon oxide layer on a silicon substrate by means of a thermal oxidation in a furnace in the presence of a gaseous mixture, said mixture comprising oxygen and Cl2, said Cl2 being generated by an organic chlorine-carbon source, particularly oxalyl chloride. This method is directed to the growth of (ultra) thin silicon oxides and/or the cleaning of a substrate using a low oxidation power. Consequently the method disclosed is especially suited for temperature below 700° C. and for oxidation ambients containing only small amounts of oxygen.
    Type: Grant
    Filed: November 26, 1997
    Date of Patent: May 14, 2002
    Assignees: Imec (vzw), ASM International, Olin
    Inventors: Paul Mertens, Michael McGeary, Hessel Sprey, Karine Kenis, Marc Schaekers, Marc Heyns
  • Patent number: 6258664
    Abstract: In one aspect, the invention includes a method of forming a silicon-comprising material having a roughened outer surface. A semiconductive substrate is provided which comprises conductively doped silicon. A layer comprising silicon and germanium is formed over the substrate. The layer is exposed to conditions which cause crystalline grains within it to increase in size until roughness of a surface of the layer is increased. Dopant is out-diffused from the conductively doped silicon and into the crystalline grains of the layer to conductively dope the layer. In another aspect, the invention includes a method of forming a capacitor construction. A substrate is provided and a conductively doped silicon-comprising material is formed to be supported by the substrate. A layer is formed against the conductively doped silicon-comprising material. The layer has an outermost surface, and comprises silicon and germanium. The layer is subjected to conditions which increase a roughness of the outermost surface.
    Type: Grant
    Filed: February 16, 1999
    Date of Patent: July 10, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Alan R. Reinberg
  • Patent number: 6221702
    Abstract: The present invention relates to a method of fabricating a thin film transistor in which a metal silicide line generated from Metal Induced Lateral Crystallization is located at the outside of a channel region. The present invention includes the steps of forming a semiconductor layer on a substrate wherein the semiconductor layer has a first region, a channel region and a second region in order, forming a gate insulating layer/a gate electrode on the channel region, doping the first and the second region heavily with impurity, forming a metal film pattern making the first region a metal-offset, and crystallizing the semiconductor layer by means of applying thermal treatment to the semiconductor layer having the metal film.
    Type: Grant
    Filed: August 28, 1998
    Date of Patent: April 24, 2001
    Assignee: LG. Philips LCD Co., Ltd.
    Inventors: Seung-Ki Joo, Tae-Kyung Kim