Abstract: Data stream transfer apparatus for receiving a data stream of data cells at variable time intervals and transmitting data frames at predetermined time intervals, including a receiving apparatus, a buffer memory, a data transfer interface, a central processing unit (CPU), and a memory access unit. The receiving apparatus receives the data cells and stores them in the buffer memory. The data transfer interface transfers data frames out of the apparatus at the predetermined time intervals and generates an indication that the data frame has been transferred. The memory access unit receives data defining a location of a data frame in the buffer memory, accesses the buffer memory to retrieve that data frame and transmits that data frame to the data transfer interface. The CPU, upon receiving the indication, determines a time for transfer of a subsequent data frame, and upon reaching that time, transmits to the memory access unit the location of the subsequent frame in the buffer memory.

Abstract: A data reception unit for receiving a plurality of data streams over a data chanel. The data streams are received as amounts of data, each amount of data comprising a data portion including data from a data stream and an identity portion identifying that data stream. The data reception unit comprises a data stream memory comprising a plurality of data stream storage areas and a reserve buffer, a first storage information memory for holding first storage information, a processing unit, and a data storage controller. The data storage controller, for each received amount of data, receives the identity portion of the amount of data and performs a storage operation-based on the identity portion.

Abstract: An apparatus for and a method of learning MAC addresses in a Local Area Network (LAN) Emulation (LANE) network implemented over an Asynchronous Transfer Mode (ATM) network. The LEC or LES is adapted to detect when the ATM address associated with a MAC address is no longer valid. Once an invalid ATM address is detected the existing entry can be updated or deleted. A LEC_ID table holding LEC_ID to ATM address bindings is created. Each frame received by the LEC is sniffed in order to find mismatches between the ATM address and the LEC_ID. Optionally, an LE_ARP request message can be forwarded to the LES for learning the new binding. If the MAC address is not found in the LE_ARP table, an entry can be created and added to the table. In another embodiment, the LES is adapted to detect when the MAC to ATM address binding stored in the internal LE_ARP cache is no longer valid. The LE_ARP table is populated by examining LE_ARP request and response sent and received by the LEC.

Abstract: Systems and methods for assisting multiple protocol conversion in a network accelerator. A network device includes a transmit processing engine, a receive processing engine and one or more memories, each memory including one or more buffers for storing packets. When a packet is received, the receive engine adds a 4, 8, 12 or 16-byte tag to the front of the packet on a per-VC basis and stores the packet to a buffer. Additionally, the receive engine is able to add an offset to the starting address of the packet in the buffer relative to the beginning of the buffer. When a packet is to be transmitted, the transmit engine is able to transmit the packet from an address that is offset from the starting address of the buffer by one or more bytes. Additionally, the transmit engine is able to add one of several predefined packet headers on a per-packet basis.

Abstract: Interactive voice response (IVR) services are provided to an end user at a telephone terminal (201) connected to the PSTN (202) through a telephone/IP server (205) that serves as an interface between the PSTN and an IP network (204) such as the Internet. A first IVR service is provided by a web server (203) running a service logic (207) for that service, which produces pages formatted in a phone markup language (PML) in response to an HTTP request sent over the IP network by the telephone/IP server to the web server at the URL address associated with the service. Hyperlinks to a second IVR service offered on a web server (208) at a different URL address are embedded and associated with a specific question or statement in a PML-formatted page produced by the first service.

Abstract: Packet classification apparatus includes a rule memory and a criterion memory. One type of rule memory entry contains an operator and a pointer to a criterion memory entry. The operator defines a comparison operation to be performed, such as EQUAL (exact match) or LESS THAN. The criterion memory entry contains one or more values to be used as comparands on one side of the comparison, where corresponding values from a received packet appear on the other side of the comparison. Control logic responds to packet classification requests to retrieve a rule memory entry from the rule memory, retrieve the criterion memory entry identified by the criterion memory pointer in the rule memory entry, and perform the operation specified by the operator in the rule memory entry on the values in the criterion memory entry and corresponding values included in the classification request.

Abstract: Apparatus for multiplexing electronic data-words provided by a plurality of input sources operating in accordance with respective input clocks which may be mutually asynchronous. The data-words are multiplexed to a common output operating in accordance with a system clock. The apparatus includes delay circuitry, which generates a plurality of select signals responsive to the system clock, corresponding respectively to the plurality of input sources. The apparatus also includes a plurality of synchronizers respectively associated with the plurality of input sources, each synchronizer including a series of memory buffers through which data-words from the respective input source are transferred. The series of memory buffers includes at least an input buffer, which receives the data-words from the respective input source in accordance with the respective input clock, and an output buffer, which provides the data-words for output in accordance with the corresponding select signal.

Abstract: A parallel bit stuffing method acting on a stream of serial data is disclosed. First, an input data segment is segmented from said stream of serial data. Next, a carryover segment is appended to the input data segment to form an address field. The address field is used to correlate to an output field that includes a stuffed data portion and a carryover segment portion. The carryover segment portion is used in a next cycle as the carryover segment. Finally, the stuffed data portion is output as output data segments.

Abstract: The present invention increases the communication path switching control speed. A demultiplexing circuit 2a is provided at an input side of a time division switch 1 and converts a serial signal of an input high 20a of multiplexed 32 Kbps sub rate channels into serial signals of the input highway 21a and 22a of multiplexed 64 Kbps full rate channels. A multiplexing circuit 2b is provided at an output side of the time division switch and converts serial signals of the output highways 21b and 22b of multiplexed 64 Kbps full rate channels into a serial signal of the output highway 20b of multiplexed 32 Kbps sub rate channels.

Abstract: A method for transmission of data in a digital audio broadcasting system includes the steps of providing a plurality of orthogonal frequency division multiplexed sub-carriers, with the sub-carriers including data sub-carriers and reference sub-carriers, and modulating the data sub-carriers with a digital signal representative of information to be transmitted. The reference sub-carriers are modulated with a sequence of timing bits, wherein the sequence of timing bits includes an unambiguous block synchronization word, and the number of bits comprising the block synchronization word is less than one half of the number of bits in said timing sequence. Then the orthogonal frequency division multiplexed sub-carriers are transmitted. Receivers that differentially detect the block synchronization word and use the block synchronization word to coherently detect the digital signal representative of information to be transmitted are also included.

Abstract: When multi-destination traffic is distributed through a host or switch, the decision to distribute each frame is performed by each egress port and not the ingress port. Within a link aggregation group, the multi-destination frame is sent to each of the egress ports within the link aggregation group. Each of such ports will then determine whether it should re-transmit the frame. If not, the frame is discarded.

Abstract: A CBR/VBR traffic scheduler includes multiple CBR/VBR shapers to shape traffic over a wide range of peak cell rates for multiple CBR and VBR connection. Each shaper points to one or more VCs in a link list and includes a PCR counter initialized to a first value, an SCR counter initialized to a second and an arbitration counter. Each shaper is also connected to one of several clock sources, each having an associated clock cycle. A priority encoder, coupled to each arbitration counter, provides for determining priority between shapers having one or more associated VCs ready for transmission. Both the PCR counter and the SCR counter for each shaper is decremented during each associated clock cycle. For each shaper, when the PCR counter is decremented to a value of zero, the arbitration counter is initialized to a preset value and enabled for selection by the priority encoder.

Abstract: A monitoring system for monitoring the typical response time required to execute a command at a desired remote site, e.g. a website. The monitoring system includes a mechanism for synchronizing the real-time internal clock at both the administrative node and the transaction node. Once both real-time internal clocks are synchronized, a synthetic transaction is generated by the administrative node and sent to the transaction node. The instant at which the command is sent is recorded by the administrative node. The command is received by the transaction node and each important step involved in executing the command is recorded with a time stamp information. Once the command has been completed, the results of the synthetic command, e.g. the requested data, drawing(s), diagram(s) or information, are sent to the administrative node along with the time stamp information indicating the elapsed time for executing each important step of the synthetic transaction.