Abstract: The present disclosure provides a display panel including a display GOA unit and a dummy GOA unit connected to the display GOA unit, a pull-down module of the display GOA unit receives a frame start signal and a pull-down module of the dummy GOA unit receives a control signal; within a frame duration, the frame start signal comprises one frame start pulse, and the control signal comprises a first pulse and a second pulse sequentially generated at intervals; a first pulse of a previous frame is generated between a last clock pulse of a previous frame and a frame start pulse of a next frame; a second pulse of the previous frame is generated between the last clock pulse of the previous frame and the frame start pulse of the next frame or in synchronization with the frame start pulse of the next frame.

Abstract: A deformed display device includes a display area including a plurality of pixel array areas in which a plurality of pixel array groups are arranged and a plurality of circuit areas in which a plurality of driving circuits are arranged, wherein the pixel array groups and the driving circuits form a pixel block; and a dummy area disposed at one side of the display area and including a plurality of dummy pixel array areas in which a plurality of dummy pixel array groups are arranged and a plurality of dummy circuit areas in which a plurality of dummy circuits are arranged, wherein the dummy pixel array groups and the dummy circuits do not form the pixel block.

Abstract: Methods and apparatus for glint-assisted gaze tracking in a VR/AR head-mounted display (HMD). Images of a user's eyes captured by gaze tracking cameras may be analyzed to detect glints (reflections on the cornea of light sources that illuminate the user's eyes) and the pupil. The glints are matched to particular ones of the light sources. The glint-light source matches are used to determine the cornea center of the eye, and the pupil center is determined. The optical axis of the eye is reconstructed from the cornea center and the pupil center, and the visual axis is then reconstructed from the optical axis and a 3D model of the user's eye. The point of gaze on the display is then determined based on the visual axis and a 3D model of the HMD.

Abstract: A display device includes a display panel including data lines configured to receive an image signal, gate lines configured to receive a scan signal, and gate connection lines configured to transmit the scan signal to the gate lines; and a multi-chip film package including, on a film, a first gate integrated circuit (IC) configured to transmit a first scan signal to the gate connection lines through first gate output lines, a second gate IC configured to transmit a second scan signal to the gate connection lines through second gate output lines, and a source IC configured to transmit the image signal to the data lines through source output lines. Each of the first gate output lines is between two adjacent source output lines, and each of the second gate output lines is between two adjacent source output lines.

Abstract: A display device includes a display panel including a first display region and a second display region surrounding the first display region, where a first pixel having a first size is disposed in the first display region, and a second pixel having a second size is disposed in the second display region, a gate driver which applies a gate signal to a gate line, a data driver which applies a data voltage to a data line, and a timing controller which controls the gate driver and the data driver. The gate line includes a first gate line connected to both the first pixel and the second pixel, and a second gate line connected only to the second pixel. The data line includes a first data line which does not transmit the data voltage to the second pixel connected to the second gate line, and a second data line which transmits the data voltage to the second pixel connected to the second gate line.

Abstract: A gate driver circuit and a display device including the same have a voltage difference between output lines of the gate driver circuit that is reduced. To this end, a first gate driver is disposed on one side of a display panel, while a second gate driver is disposed on side of the display panel opposite the one side. An odd-numbered output line of the first gate driver is connected to an even-numbered output line of the second gate driver, while an even-numbered output line of the first gate driver is connected to an odd-numbered output line of the second gate driver. Therefore, the voltage difference between the output lines of the gate driver circuit is minimized or reduced.

Abstract: A display module includes: a display panel; and an input sensing circuit disposed thereon, the input sensing circuit including: a first sensor group including a plurality of first sensors arranged in a first direction; a plurality of first connection portions electrically connecting two adjacent first sensors of the plurality of first sensors, respectively; a second sensor group including a plurality of second sensors arranged in a second direction crossing the first direction; a plurality of second connection portions electrically connecting two adjacent second sensors of the plurality of second sensors, respectively; a first signal line electrically connected to one first sensor of the plurality of first sensors; a first measuring line electrically connected to the one first sensor among the plurality of first sensors and spaced apart from the first signal line; and a second measuring line electrically connected to another first sensor among the plurality of first sensors.

Abstract: A gate driver on array (GOA) circuit and a display panel are provided. The GOA circuit includes multi-stage cascaded GOA units, and each GOA unit includes a bootstrap module. The bootstrap effect of the bootstrap module is utilized to increase the gate voltage of the output transistor, which can effectively reduce the rise time and fall time of the scan signal output by each GOA unit, thereby improving the charging capability of the display panel.

Abstract: A display apparatus include a display module, a cover plate, and a lifting module. The display module includes a display panel that displays an image in a display area. The display area includes an Always On Display (AOD) area. The cover plate covers a portion of the display module. The lifting module moves vertically the cover plate. At least the AOD area of the display area is not covered with the cover plate and is exposed to an outside. AOD data is displayed in the AOD area. Thus, an AOD function can be implemented.

Abstract: Provided is a level conversion circuit. The level conversion circuit includes at least two level conversion sub-circuits; and each of the level conversion sub-circuits is further connected to at least one first power supply terminal, at least one second power supply terminal and at least one of a plurality of output signal terminals, wherein the first power supply signals provided by the first power supply terminals connected to the at least two level conversion sub-circuits are at different levels, and the second power supply signals provided by the second power supply terminals connected to the at least two level conversion sub-circuits are at different levels.

Abstract: There is provided a gate driving circuit comprising N first shift registers arranged alternately with N second shift registers. An input signal terminal of an n-th stage of first shift register is coupled to an output signal terminal of an (n?i)-th stage of first shift register, and a reset signal terminal of the n-th stage of first shift register is coupled to an output signal terminal of an (n+j)-th stage of first shift register. Input signal terminal and reset signal terminal of n-th stage of second shift register are coupled to output signal terminals of (n?i)-th and (n+j)-th stages of second shift registers respectively. K=6, i=3, and j=4. Reset signal terminals of (N?j+1)-th to N-th stages of first shift registers and reset signal terminals of (N?j+1)-th to N-th stages of second shift registers are configured to receive a total reset signal.

Abstract: The present application provides a display panel and a display device. The display panel includes a gate driving circuit and a plurality of rows of pixel circuits. By electrically connecting a gate of a driving transistor in each of the pixel circuits to at least one oxide thin-film transistor, each of the pixel circuits has a low leakage characteristic, thereby realizing a low-frequency driving display of the pixel circuits. On this basis, a display time interval between two adjacent rows of the pixel circuits can be lengthened about half-frame time, thereby realizing an ultra-low-frequency driving display.

Abstract: A pointer position detection method performed by a sensor controller connected to a sensor pattern includes: detecting a pen signal transmitted via a pen electrode provided at a distal end of an active pen, detecting a position of the active pen based on a level of the pen signal detected; detecting one or more candidate touch positions of a passive pointer that does not transmit a signal by detecting one or more changes of one or more capacitances of the sensor pattern, and outputting, as the position of the passive pointer, the one or more candidate touch positions remaining after excluding the position of the active pen from the one or more candidate touch positions.

Abstract: A light emitting display apparatus includes a gate driver including stages provided in a substrate and a plurality of gate lines connected to the stages. Each of the stages includes a shift register and two buffers connected to the shift register, a first buffer of two buffers configuring an nth stage and a first shift register configuring the nth stage are provided in an nth horizontal portion and a second buffer of the two buffers is provided in an n+2th horizontal portion, a third buffer of two buffers configuring an n+1th stage and a second shift register configuring the n+1th stage are provided in an n+3th horizontal portion and a fourth buffer of the two buffers is provided in an n+1th horizontal portion, and the nth horizontal portion is a region including pixels which are arranged along a 4n?3th gate line and a 4n?2th gate line.

Abstract: A power system for display apparatuses, which may predict in real time the amount of supplied current for displaying an image in a display apparatus, includes an image data analyzer analyzing image data input from the outside to predict a pixel degradation degree of each of pixels included in a display panel and predicting an amount of current supplied to the display panel on the basis of the predicted pixel degradation degree and a power supply supplying the display panel with power corresponding to the predicted amount of supplied current.

Abstract: A light-emitting assembly includes a substrate and a plurality of light-emitting elements. The substrate includes a component arrangement region and a planar region in a top view, and includes a base material layer, a filled layer and a protection layer in a sectional view. A thickness of the filled layer is greater than a thickness of the protection layer. The thickness of the protection layer is greater than 0 ?m and less than 30 ?m. The plurality of light-emitting elements are located on the component arrangement region. This disclosure can improve the non-uniform brightness issue (hotspots) or enhance the optical performance.

Abstract: A driving circuit and a display panel are disclosed. The driving circuit includes a plurality of cascaded driving units. The driving unit includes a forward/backward scan control module, a first control node controlling module, a second control node controlling module, a global control module, a regulating module, a first output module configured to output a stage signal, and a second output module configured to output a gate driving signal. A voltage level of the gate driving signal is higher than a voltage level of the stage signal.

Abstract: A gate driver on array (GOA) circuit and a display panel are provided. The GOA circuit includes a plurality of cascaded GOA units. The GOA units include a first GOA unit and a second GOA unit. By setting a virtual reset module in the second GOA unit, and the virtual reset module corresponding to the reset module in the first GOA unit, a difference between the first GOA unit and the second GOA unit is reduced and stability of the GOA circuit is improved.

Abstract: A computing device includes a display panel having a first end and a second end, a sensor, and a processing circuitry. The display panel includes a matrix of pixels and defines an aperture surrounded by pixels of the matrix of pixels but that does not include pixels of the matrix of pixels. A length of the aperture parallel to an axis connecting the first end and the second end is greater than a length of the aperture perpendicular to the axis. The sensor is configured to capture light that passes through the aperture. The processing circuitry, disposed proximal to the second end, is configured to output control signals to pixels of the matrix of pixels.

Abstract: In an embodiment, an electronic display includes an active area including a plurality of pixels arranged in columns and a plurality of source drivers driving image data to columns of pixels. The electronic display also includes a first plurality of switches selectively coupling respective source drivers of the plurality of source drivers to one or more columns. Selective coupling enables the respective source drivers to, at different times, drive the image data to: a single column; and multiple columns. In another embodiment, an electronic display includes a display panel configured to operate using a reference voltage received via a resistive path having a routing resistance, a reference voltage source outputting the reference voltage, and a feedback circuit sensing an electrical parameter of the resistive path and producing a compensation voltage that, when added to the reference voltage, causes the reference voltage to remain substantially constant at the display panel.