Abstract: A method for locating critical control points on a part or combination of parts during a manufacturing process involves mating, directly or indirectly, a jig extension to the part or parts. A pattern on the jig extension defines an origin point that is used to track the position of the part or parts during manufacturing, such as during location-sensitive operations. The jig extension may be a shoe last extension which connects to a shoe or shoe component via a shoe last.
Type:
Grant
Filed:
June 3, 2022
Date of Patent:
December 19, 2023
Assignee:
NIKE, Inc.
Inventors:
Dragan Jurkovic, Ming-Feng Jean, Chin-Yi Lin, Chun-Chi Lin
Abstract: A clam shell cover cap device is a lockable closure which fits over existing medication vials used in the pharmacy and medical industries. It comes preset, with a random combination. The combination is marked with an indicator sticker. The clam Shell Cover Cap may be used to lock a vial.
Abstract: Represented and described is a resealable pouring element for cardboard/plastic composite packages, in particular beverage packages, with a base element having a circumferential fastening flange as well as an external thread, with opening means arranged at least in the unopened state of the pouring element in the interior of the base element and with a screw cap with internal thread, wherein the opening means are designed such that when the composite package is initially opened by unscrewing the screw cap by breaking the composite material of the package or a barrier layer located in the base element, a pour opening is created inside the pouring element and wherein at least one tamper-evident seal is arranged between the base element and the screw cap.
Type:
Grant
Filed:
October 13, 2020
Date of Patent:
December 12, 2023
Assignee:
SIG Technology AG
Inventors:
Markus Wassum, David Koller, Hansjörg Huber
Abstract: A composite textile fabric that includes a first (face) fabric layer, and a second (back) fabric layer that is formed concurrently with the first fabric layer in a plaited construction. The second fabric includes a plurality of anchored regions at which the second fabric layer is anchored to, and in intimate contact with, the first fabric layer. The second fabric layer also includes a plurality of floating regions, overlying and unattached to the first fabric layer, interspersed between the anchored regions.
Type:
Grant
Filed:
December 8, 2021
Date of Patent:
December 12, 2023
Assignee:
MMI-IPCO, LLC
Inventors:
Moshe Rock, William K. Lie, Edward P. Dionne, James Zeiba, David Costello, Jane Hunter, Gadalia Vainer, Marcus Webster
Abstract: Retiring instructions out-of-order includes: receiving processor instructions comprising two or more and fewer than all processor instructions generated based on a program, where the processor instructions include a first instruction and a second instruction such that the first instruction precedes the second instruction in a program order of the program; receiving a start instruction that immediately precedes the processor instructions and indicates that the processor instructions are to be retired out-of-order; receiving a stop instruction immediately that succeeds the processor instructions and indicates a stop to out-of-order instruction retirement; and, in response to completing execution of the second instruction before completing execution of the first instruction, retiring the second instruction before retiring the first instruction.
Abstract: The disclosure relates to a 5G or 6G communication system for supporting higher data transmission rates than 4G communication systems such as LTE systems. A method performed by a base station in a wireless communication system is provided. The method includes generating a signal including configuration information for at least one bandwidth part (BWP) and transmitting the generated signal. At least part of the at least one BWP may be configured as a resource for multicast.
Type:
Grant
Filed:
August 5, 2021
Date of Patent:
December 12, 2023
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Jeongho Yeo, Taehyoung Kim, Hyunseok Ryu, Seunghoon Choi
Abstract: Systems and methods are provided to perform multiplication-delayed-addition operations in a systolic array to increase clock speeds, reduce circuit area, and/or reduce dynamic power consumption. Each processing element in the systolic array can have a pipeline configured to perform a multiplication during a first systolic interval and to perform an accumulation during a second systolic interval. The multiplication result from the first systolic interval can be stored in a delay register for use by the accumulator during the second systolic interval. A skip detection circuit can be used to skip one or more of the multiplication, storing in the delay register, and the addition during skip conditions for improved energy efficiency.
Abstract: Embodiments of file restores in a Data Domain (DD) file system implementing a DD Bandwidth Optimized Open Storage Technology (DDBoost) library that translates application read and write request to DDBoost application program interfaces (APIs). A prefetch queue processor creates an intent to read the file. The application passes the file handle of the file, and the destination handle where the data must be read into. As the queue is processed, the prefetch for the request (handle/offset/length) is passed to the file server. The filesystem processes the request to open the file to load into memory. As the read request for the same file reaches the filesystem the file data is read from memory for writing to the destination handle. An extended DDBoost API expression is defined to pass the current path and destination path to the application.
Type:
Grant
Filed:
December 21, 2021
Date of Patent:
December 12, 2023
Assignee:
Dell Products L.P.
Inventors:
Nitin Madan, Donna Barry Lewis, Kedar Godbole
Abstract: Embodiments described herein include software, firmware, and hardware logic that provides techniques to perform arithmetic on sparse data via a systolic processing unit. One embodiment provides for data aware sparsity via compressed bitstreams. One embodiment provides for block sparse dot product instructions. One embodiment provides for a depth-wise adapter for a systolic array.
Type:
Grant
Filed:
December 15, 2020
Date of Patent:
December 12, 2023
Assignee:
Intel Corporation
Inventors:
Abhishek Appu, Subramaniam Maiyuran, Mike Macpherson, Fangwen Fu, Jiasheng Chen, Varghese George, Vasanth Ranganathan, Ashutosh Garg, Joydeep Ray
Abstract: An automated fire detection system includes a distributed network of standalone sensor units having multifunctional capability to detect wildfires at their earliest stage. Multiple modes of verification are employed, including thermal imaging, spectral analysis, near infrared and long-wave infrared measurements, measurements of the presence and/or concentration of smoke, and sensing local temperature and humidity and wind speed and direction. A dedicated algorithm receives all data from the network and determines the location of flames from the imaging sensors, combined with the smoke, temperature, humidity, and wind measurements at every dispersed device.
Abstract: An image decoding method performed by a decoding apparatus according to the present disclosure includes receiving a bitstream including residual information; deriving quantized transform coefficients for a current block based on the residual information included in the bitstream; deriving transform coefficients for the current block from the quantized transform coefficients based on an inverse quantization process; deriving residual samples for the current block by applying inverse transform to the derived transform coefficients; and generating a reconstructed picture based on the residual samples for the current block.
Type:
Grant
Filed:
April 22, 2020
Date of Patent:
December 5, 2023
Assignee:
LG ELECTRONICS INC.
Inventors:
Jungah Choi, Seunghwan Kim, Jin Heo, Sunmi Yoo, Ling Li, Jangwon Choi
Abstract: Embodiments of small file restore process in deduplication file system wherein restoration requires issuing a read request within an I/O request to the file system. A prefetch queue processor creates an intent to read the file, rather than opening the file upon receiving the request. During this step, the application passes the file handle of the file, and the destination handle where the data must be read into. As the queue is processed, the prefetch for the request (handle/offset/length) is passed to the file server. The filesystem processes the request to equivalently ‘open’ the file, and bring the data into memory. As the read request for the same file reaches the filesystem the file data is read from memory for writing to the destination handle.
Type:
Grant
Filed:
December 21, 2021
Date of Patent:
December 5, 2023
Assignee:
Dell Products L.P.
Inventors:
Nitin Madan, Donna Barry Lewis, Kedar Godbole
Abstract: A micro puree machine including a housing, a power shaft, a bowl assembly and a platform. The power shaft extends from the housing. The bowl assembly including at least one locking bowl element. The platform includes at least one complementary locking platform element that is configured to engage the at least one locking bowl element such that rotation of the bowl assembly relative to the platform is prevented at times the bowl assembly is positioned thereon. The platform is rotatable from a first position to a second position relative to the housing such that the platform raises the bowl assembly towards the power shaft during the rotation of the bowl assembly and platform. The raising of the bowl assembly facilitates connection between the power shaft and a blade assembly that is positioned in a lid assembly on the bowl assembly.
Type:
Grant
Filed:
May 12, 2023
Date of Patent:
December 5, 2023
Assignee:
SHARKNINJA OPERATING LLC
Inventors:
Jared James Proulx, Christopher William Hedges, Pierce James Barnard, Ming Li Shi, Xu Sheng Deng
Abstract: Techniques related to coding video using adaptive quantization rounding offsets for use in transform coefficient quantization are discussed. Such techniques may include determining the value of a quantization rounding offset for a picture of a video sequence based on evaluating a maximum coding bit limit of the picture, a quantization parameter of the picture, and parameters corresponding to the video.
Type:
Grant
Filed:
July 28, 2022
Date of Patent:
December 5, 2023
Assignee:
Tahoe Research, Ltd.
Inventors:
Ximin Zhang, Sang-hee Lee, Keith W. Rowe
Abstract: A method for implementing an adaptive color transform (ACT) during image/video encoding and decoding, comprises determining, for a conversion between a video comprising a block and a bitstream of the video, that a size of the block is greater than a maximum allowed size for an ACT mode, and performing, based on the determining, the conversion, wherein, in response to the size of the block being greater than the maximum allowed size for the ACT mode, the block is partitioned into multiple sub-blocks, and wherein each of the multiple sub-blocks share a same prediction mode, and the ACT mode is enabled at a sub-block level.
Type:
Grant
Filed:
July 5, 2022
Date of Patent:
December 5, 2023
Assignees:
BEIJING BYTEDANCE NETWORK TECHNOLOGY CO., LTD., BYTEDANCE INC.
Inventors:
Weijia Zhu, Jizheng Xu, Li Zhang, Kai Zhang, Yue Wang
Inventors:
Christopher G. Alviar, Ryan Peter Bowman, Cathlene Buchanan, Kristina Edmonson, Brendan Greetham, Jeremy Wong, Nikolaos Kalogeropoulos, Christian Schneider