Abstract: The present application provides a display substrate, a display panel, and a display device. The display substrate includes a substrate layer. The substrate layer includes a first substrate portion and a second substrate portion joined to each other. The first substrate portion is made of a first substrate material and configured to be disposed opposite to a photosensitive element. The second substrate portion is made of a second substrate material. A light transmittance of the first substrate material is larger than or equal to a light transmittance threshold, and a light transmittance of the second substrate material is smaller than the light transmittance threshold.

Abstract: An electro-optical device includes a first light-emitting element configured to emit light in a first wavelength region, a second light-emitting element configured to emit light in a second wavelength region shorter than the first wavelength region, a third light-emitting element configured to emit light in a third wavelength region shorter than the second wavelength region, a first filter configured to transmit light in the first wavelength region and light in the second wavelength region and absorb light in the third wavelength region, and a second filter configured to transmit light in the second wavelength region and light in the third wavelength region and absorb light in the first wavelength region.

Abstract: A semiconductor device package and a fabrication method thereof are disclosed. The semiconductor package comprises: a package component having a first mounting surface and a second mounting surface; and a first electronic component having a first conductive pad signal communicatively mounted on the first mounting surface through a first type connector; wherein the first type connector comprises a first solder composition having a lower melting point layer sandwiched between a pair of higher melting point layers, wherein the lower melting point layer is composed of alloys capable of forming a room temperature eutectic.

Abstract: A semiconductor die includes a substrate including a semiconductor surface including circuitry electrically connected to die bond pads that include a first die bond pad exposed by a passivation layer, a top dielectric layer over the passivation layer, and a metal layer electrically connected to the first die bond pad. A pillar is on the metal layer over the first die bond pad, and a solder cap is on a top side of the pillar. The solder cap includes an essentially vertical sidewall portion generally beginning at a top corner edge of the pillar.

Abstract: A semiconductor package includes a substrate, a first insulation layer, a conductive via and a conductive trace. The substrate includes a conductive component. The first insulation layer is formed on the substrate and having a first through hole exposing the conductive component. The conductive via is formed within the first through hole. The conductive trace is directly connected to the conductive via which is located directly above the first through hole.

Abstract: This application discloses a photoreceptor, a panel, and a method for manufacturing a photoreceptor. The photoreceptor includes a photosensitive layer. The photosensitive layer includes a subject entity including a plurality of holes, and an object entity including at least two photosensitive materials whose photosensitive wavelength bands are different. The holes of the subject entity are filled with the photosensitive materials.

Abstract: A board unit according to an embodiment includes a circuit board, a semiconductor device, and a wire. The semiconductor device has a bottom surface facing the circuit board. The semiconductor device includes a plurality of bonding members between the circuit board and the bottom surface. The wire is disposed between the circuit board and the bottom surface. The bonding members have a first row and a second row. Two or more bonding members align in the first row in a first direction. Two or more bonding members align in the second row in the first direction. The second row is apart from the first row in a second direction intersecting with the first direction. The wire includes a first portion disposed between the first row and the second row, and the wire has a strength higher than that of one of the bonding members.

Abstract: A semiconductor device includes: a semiconductor substrate having a first main surface; an aluminum electrode having a first surface facing the first main surface and a second surface opposite to the first surface, the aluminum electrode being disposed on the semiconductor substrate; a passivation film that covers a peripheral edge of the second surface and that is provided with an opening from which a portion of the second surface is exposed; a copper film disposed on the second surface exposed from the opening so as to be separated from the passivation film; and a metal film disposed on the second surface exposed from between the passivation film and the copper film. The metal film is constituted of at least one selected from a group consisting of a nickel film, a tantalum film, a tantalum nitride film, a tungsten film, a titanium film, and a titanium nitride film.

Abstract: A method for producing a quantum dot composition includes providing a preliminary quantum dot composition containing a quantum dot to which a ligand is bonded and a free ligand, providing an adsorbent to the preliminary quantum dot composition, adsorbing the free ligand to the adsorbent, and removing a modified adsorbent to which the free ligand is adsorbed to provide a purified quantum dot composition. A light emitting element including the purified quantum dot composition may have superior luminous efficiency.

Abstract: A method of manufacturing a semiconductor device includes forming a first through via surrounded by a liner in a first semiconductor substrate, first-recessing the semiconductor substrate to expose a first portion of the liner covering an end portion of the first through via, and forming a first diffusion barrier layer covering the first-recessed first semiconductor substrate and exposing a second portion of the liner. The method also includes removing the second portion of the liner and second-recessing the first diffusion barrier layer. The method further includes forming a second diffusion barrier layer that covers the second-recessed first diffusion barrier layer and a top portion of the liner from which the second portion is removed and exposes a top surface of the end portion of the first through via.

Abstract: A semiconductor structure and a method for same are provided. The semiconductor structure includes: a first base having a first face, a second base having a second face, and a welding structure. The first base has an electrical connection column protruding from the first face. A first groove is provided at top of the electrical connection column. A conductive column is provided in the second base, and the second base also has a second groove. A top face and at least portion of a side face of the conductive column are exposed by the second groove. The electrical connection column is partially located in the second groove, and the conductive column is partially located in the first groove. At least portion of the welding structure is filled in the second groove, and at least further portion of the welding structure is filled between the conductive column and first groove.

Abstract: A field effect transistor includes a source region embedded in a semiconductor material layer, a drain region embedded in the semiconductor material layer and laterally spaced from the source region by a channel, a gate stack including a gate dielectric and a gate electrode, a shallow trench isolation portion embedded in an upper portion of the semiconductor material layer and contacting the drain region and the gate stack, and a concave drain extension region continuously extending underneath the shallow trench isolation portion from a bottom surface of the gate dielectric to a bottom surface of the drain region.

Abstract: A passive amplifier is provided that includes an input sampling switch, a sampling capacitance, and metal-oxide-semiconductor capacitor devices. An input signal may be sampled onto the sampling capacitance by turning on the input sampling switch while the metal-oxide-semiconductor capacitors are activated. After the sampling phase, the metal-oxide-semiconductor capacitors are deactivated to provide a voltage gain. The voltage gain can be conditionally applied depending on the signal level of the sampled input.

Abstract: An electro-optical device includes a first light-emitting element configured to emit light in a first wavelength region, a second light-emitting element configured to emit light in a second wavelength region shorter than the first wavelength region, a third light-emitting element configured to emit light in a third wavelength region shorter than the second wavelength region, a first filter configured to transmit light in the first wavelength region and light in the second wavelength region and absorb light in the third wavelength region, and a second filter configured to transmit light in the second wavelength region and light in the third wavelength region and absorb light in the first wavelength region.

Abstract: An organic EL device includes at least an anode, a first light-emitting layer, an intermediate layer, a second light-emitting layer, and a cathode in this order. The intermediate layer is adjacent to the first light-emitting layer and the second light-emitting layer. The first light-emitting layer and the second light-emitting layer can trap electrons. A material constituting the intermediate layer is a hydrocarbon that has a HOMO level equal to or lower than the HOMO level of a host of the first light-emitting layer and that has a high S1 level.

Abstract: A method for manufacturing a photovoltaic module having at least one photovoltaic cell includes a step of encapsulating the photovoltaic cell including the formation of a stack having the photovoltaic cell; an encapsulation film based on a polymer material cross-linked at least at its freezing point; and an adhesion layer based on a crosslinkable polymer material. The adhesion layer is configured to adhere the encapsulation film to the photovoltaic cell. The manufacturing method also includes a cross-linking step including cross-linking the crosslinkable polymer material of the adhesion layer.

Abstract: The present disclosure generally relates to a flip chip assembly having a bump that reduces stress levels in a low-k dielectric layer in the flip chip. Rather than having a single, large area plateau that interfaces with a large corresponding opening of an insulating layer in the flip chip, the bump includes a plurality of much smaller pillars that interface with a corresponding plurality of openings in the insulating layer. In so doing, the low-k layer within the flip chip experiences much less stress and hence, fewer failures.

Abstract: Embodiments of the present disclosure relate to a display panel and a display device. The display panel comprises a substrate including a first display area and a second display area each having a plurality of sub-pixels, wherein the number of sub-pixels per unit area in the first display area is less than the number of sub-pixels per unit area in the second display area; a transistor layer disposed over the substrate and including a plurality of transistors; a planarization layer over the transistor layer; a light emitting element layer including a common electrode including a plurality of holes in the first display area, disposed over the planarization layer, and including a plurality of light emitting elements; and an antenna comprising a first antenna electrode disposed in the transistor layer and a second antenna electrode disposed over the first antenna electrode, disposed in the first display area and at least a part of which overlaps the plurality of holes.