Abstract: A upper medium access control processor is functionally defined by a set of tasks, where each task has a linked list queue for holding messages. Communications between tasks are achieved by placing the message onto the linked list queue of the desired task. The tasks are arranged into a plurality of prioritized groups for execution. The scheduler utilizes a N-phase scheme where tasks in a specific set of groups are executed at each phase. All tasks are guaranteed to run at least once during a complete cycle, thus preventing task starvation. The scheduler accommodates both synchronous and asynchronous tasks and still maintains the given priority scheme.