Abstract: A semiconductor device includes an erase gate electrode, an erase gate dielectric, first and second floating gate electrodes, first and second control gate electrodes, a first select gate electrode, a second select gate electrode, a common source strap, and a silicide pad. The erase gate electrode is over a first portion of a substrate. The common source strap is over a second portion of the substrate, in which the common source strap and the erase gate electrode are arranged along a second direction perpendicular to the first direction. The silicide pad is under the common source strap and in the second portion of the substrate, wherein a top surface of the silicide pad is flatter than a bottom surface of the erase gate dielectric.

Abstract: The present disclosure discloses a photoelectric detector, a preparation method thereof, a display panel and a display device. The photoelectric detector includes a base, and a thin film transistor (TFT) and a photosensitive PIN device on the base, wherein the PIN device includes an I-type region that does not overlap with an orthographic projection of the TFT on the base; a first etching barrier layer covering a top surface of the I-type region; a first heavily doped region in contact with a side surface on a side, proximate to the TFT, of the I-type region; and a second heavily doped region in contact with a side surface on a side, away from the TFT, of the I-type region, the doping types of the first heavily doped region and the second heavily doped region being different from each other.

Abstract: A photosensitive field-effect transistor comprising a substrate with a source electrode, a drain electrode and a gate electrode. The transistor comprises a photoactive layer which at least partly covers the gate electrode, and a channel layer which covers the photoactive layer and at least partly covers both the source electrode and the drain electrode. The channel layer comprises a two-dimensional material whose conductivity is modulated by charge carriers transferred from the photoactive layer when electromagnetic radiation is absorbed in the photoactive layer.

Abstract: A gate pad is includes a first portion disposed in a gate pad region and a second portion disposed in a gate resistance region and connected to the first portion, the gate pad has a planar shape in which the second portion protrudes from the first portion. A gate polysilicon layer disposed on a front surface of a semiconductor substrate via a gate insulating film, between the semiconductor substrate and an interlayer insulating film, has a surface area at least equal to that of the gate pad and opposes an entire surface of the gate pad in a depth direction. ESD capability of a first region where the gate pad is provided is greater than ESD capability of a second region where a gate resistance is provided and is greater than ESD capability of a third region where a MOS structure of an active region is provided.

Abstract: An optoelectronic device including a semiconductor layer formed from a central segment and at least two lateral segments forming tensioning arms that extend along a longitudinal axis A1. The semiconductor layer furthermore includes at least two lateral segments forming electrical biasing arms that extend along a transverse axis A2 orthogonal to the axis A1.

Abstract: In accordance with various embodiments of the disclosed subject matter, a phototransistor comprises an NPN or PNP phototransistor having a base including a Si-region, a Ge-region, and a Ge—Si interface region wherein photons are absorbed in the Ge region and conduction-band electrons are attracted to the interface region such that the electrons' mobility is enhanced thereby.

Abstract: Stitched die packaging techniques and structures are described in which reconstituted chips are formed using wafer reconstitution and die-stitching techniques. In an embodiment, a chip includes a reconstituted chip-level back end of the line (BEOL) build-up structure to connect a die set embedded in an inorganic gap fill material.

Abstract: A photodetector includes a photodetecting region in a semiconductor substrate, and a reflector extending at least partially along a sidewall of the photodetecting region in the semiconductor substrate. The reflector includes an air gap defined in the semiconductor substrate. The reflector allows use of thinner germanium for the photodetecting region. The air gap may have a variety of internal features to direct electromagnetic radiation towards the photodetecting region.

Abstract: A system and method are provided for repairing an emissive element display. If a defective emissive element is detected in a subpixel, a subpixel repair interface isolates the defective emissive element. The repair interface may be a parallel repair interface with n number of selectively fusible electrically conductive repair nodes, connected in parallel to a control line of the matrix. Alternatively, the repair interface may be a series repair interface with m number of repair nodes, selectively connectable to bypass adjacent (defective) series-connected emissive elements. If the subpixel emissive elements are connected in parallel, and a defective low impedance emissive element is detected, a parallel repair interface fuses open a connection between the defective emissive element and a matrix control line. If the subpixels include series-connected emissive elements, and a high impedance emissive element is detected, a series repair interface forms a connection bypassing the defective emissive element.

Abstract: An array substrate which includes a display region and a peripheral region surrounding the display region, the peripheral region includes a data line lead region and a driving circuit region, and the data line lead region is between the driving circuit region and the display region; the driving circuit region includes a driving circuit, the data line lead region includes a the plurality of data line leads, and the plurality of data line leads extend from the display region and are electrically connected with the driving circuit; and the data line lead region includes peripheral data line leads, a region of the peripheral region close to the peripheral data line leads includes at least one retaining wall configured to prevent plasma from affecting the peripheral data line leads. A method for fabricating an array substrate, a display panel, and a display device are also disclosed.

Abstract: A light receiving device includes a substrate, a first contact layer disposed on a surface of the substrate, a light receiving layer disposed on the first contact layer, an intermediate layer disposed on the light receiving layer, a wide-gap layer having a pn junction disposed on the intermediate layer, a second contact layer disposed on the wide-gap layer, and a groove formed for pixel isolation by removing the second contact layer and part of the wide-gap layer, wherein the intermediate layer has a wider band gap than the light receiving layer, and wherein the wide-gap layer has a wider band gap than the intermediate layer.

Abstract: An embodiment of a silicon controlled rectifier (SCR) includes a semiconductor body, an active device region, and a device isolation region configured to electrically insulate the active device region from neighboring active device regions. First SCR regions and a second SCR region of a first conductivity type are in the active device region. A first pn-junction or Schottky junction is formed at an interface between the first SCR regions and the second SCR region. A first plurality of the first SCR regions and sub-regions of the second SCR region are alternately arranged and directly adjoin one another. A second pn-junction is formed at an interface between the second SCR region and a third SCR region of a second conductivity type. A third pn-junction is formed at an interface between the third SCR region and a fourth SCR region of the first conductivity type.

Abstract: A semiconductor device includes a lead frame, an electronic device, a package body, and a first shield plate. The lead frame includes a die mount structure, signal leads, a first shield lead, a second shield lead, and a first shield mount that spans the first and second shield leads. The electronic device can be mounted to the die mount structure and can be coupled to the signal leads. The package body encapsulates the electronic device and the lead frame such that (i) each of the first shield lead, the second shield lead, and the signal leads includes an external portion that extends beyond the exterior surface of the package body, and (ii) the first shield mount extends beyond the exterior surface of the package body. The first shield plate can be coupled to the first shield mount.

Abstract: The present disclosure provides an array substrate and a method for manufacturing an array substrate. The array substrate includes a substrate, a switch assembly disposed on the substrate and correspondingly disposed beside the switch assembly, a color photoresist layer formed on the switch assembly and the photosensor, and a pixel electrode formed on the color photoresist layers and coupled with the switch assembly. The switch assembly includes a first metal layer. The photosensor includes a first electrode layer formed directly on the substrate and a first amorphous silicon layer disposed above the first electrode layer. The first electrode layer and the first metal layer are disposed on a same layer.

Abstract: A pixel arrangement structure, a display substrate, a display device, and a mask are provided. The pixel arrangement structure includes: a first repeating unit and a second repeating unit. The first repeating unit includes a first sub-pixel, a second sub-pixel, and two third sub-pixels, and the second repeating unit includes two fourth sub-pixels, a fifth sub-pixel, and a sixth sub-pixel. In a first direction, the two third sub-pixels are between the first sub-pixel and the second sub-pixel, and the two fourth sub-pixels are between the fifth sub-pixel and the sixth sub-pixel. The two fourth sub-pixels are arranged along the first direction, the two third sub-pixels are arranged along a second direction, and the first direction and the second direction are not parallel to each other.

Abstract: A semiconductor package includes: a connection structure having first and second surfaces opposing each other and including a redistribution layer; a semiconductor chip disposed on the first surface of the connection structure and having connection pads connected to the redistribution layer; an encapsulant disposed on the first surface of the connection structure and encapsulating the semiconductor chip; a passivation layer disposed on the second surface of the connection structure and having a plurality of first and second openings exposing, respectively, first and second regions of the redistribution layer; and a plurality of underbump metal layers connected to the first region of the redistribution layer through the plurality of first openings, respectively.

Abstract: A method of manufacturing a display panel, the display panel, and a display device are provided. The method includes forming a first via hole within a gate insulating layer and a dielectric layer of the display panel, forming an auxiliary electrode within the first via hole and on the dielectric layer, forming an inorganic insulating layer on the auxiliary electrode, and forming a cathode on the inorganic insulating layer. The cathode, the inorganic insulating layer, and the auxiliary electrode form a capacitance. The method maintains stability of a cathode voltage of the display panel, thereby improving uniformity of brightness of the display panel.

Abstract: A method for producing a photo-emitting and/or photo-receiving device with a metal optical separation grid, comprising at least: producing at least one photo-emitting and/or photo-receiving component, wherein at least one first metal electrode of the photo-emitting and/or photo-receiving component covers side flanks of at least one semiconductor stack of the photo-emitting and/or photo-receiving component and extends to at least one emitting and/or receiving face of the photo-emitting and/or photo-receiving component; treating at least one face of the first metal electrode located at the emitting and/or receiving face, rendering wettable said face of the first metal electrode; producing of the metal optical separation grid on at least one support; fastening of the metal optical separation grid against said face of the first metal electrode by brazing; removing the support.

Abstract: A semiconductor device has a first transistor of a first conductivity type and a second transistor of a second conductivity type, the first transistor is arranged in an active region of a semiconductor substrate, and a gate electrode and the active region overlap with each other in a plan view and also have a portion located between the source and the drain of the first transistor of the semiconductor substrate. In the channel width direction, an impurity concentration of the second conductivity type is higher at the end than on the center side of the portion.

Abstract: The present disclosure describes methods of forming a colored conductive ribbon for a solar module which includes combining a conductive ribbon with a channeled ribbon holder, applying a color coating to at least the conductive ribbon within the channel, curing the color coating on the conductive ribbon, and separating the conductive ribbon from the channeled holder.