Patents Examined by Stella Eun
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Patent number: 8850103Abstract: A NAND flash memory logical unit. The NAND flash memory logical unit includes a control circuit that responds to commands and permits program and/or erase commands to be interruptible by read commands. The control circuit includes a set of internal registers for performing the current command, and a set of external registers for receiving commands. The control circuit also includes a set of supplemental registers that allow the NAND flash memory logical unit to have redundancy to properly hold state of an interrupted program or erase command. When the interrupted program or erase command is to resume, the NAND flash memory logical unit thus can quickly resume the paused program or erase operation. This provides significant improvement to read response times in the context of a NAND flash memory logical unit.Type: GrantFiled: August 28, 2009Date of Patent: September 30, 2014Assignee: Microsoft CorporationInventor: John G. Bennett
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Patent number: 8788956Abstract: A computer-implemented system member selector module is described. The member selector module comprises presentation module, a request detector, and a tree view updater. The presentation module presents a tree view representing hierarchically organized data comprising a plurality of member nodes. The request detector detects a request to apply a selection function to one or more member nodes. The tree view updater updates the tree view in response to the request and produces an updated tree view that identifies the one or more member nodes as parameters of the selection function.Type: GrantFiled: December 7, 2010Date of Patent: July 22, 2014Assignee: Business Objects Software Ltd.Inventor: John O'byrne
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Patent number: 8782560Abstract: Systems and methods are disclosed for providing a Graphical User Interface (GUI) for representing a reference item and a number of items of interest. In one embodiment, each item of interest is assigned to one of a number of concentric regions in a two-dimensional space based on one or more attributes of the item of interest. The concentric regions in the two-dimensional space are centered at a location in the two-dimensional space that corresponds to the reference item. A GUI is then generated such that the GUI includes concentric display regions that correspond to the concentric regions in the two-dimensional space, where a select concentric display region provides an expanded view of the items of interest located within the corresponding region in the two-dimensional space and the remaining concentric display region(s) provide collapsed view(s) of the items of interest in the corresponding region(s) of the two-dimensional space.Type: GrantFiled: December 22, 2010Date of Patent: July 15, 2014Assignee: Waldeck Technology, LLCInventors: Sean T. Purdy, Kenneth Jennings, Ravi Reddy Katpelly, Steven L. Petersen
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Patent number: 8732411Abstract: Technologies for eliminating duplicate data within a storage system can efficiently identify and eliminate duplication by remapping borrower regions to share physical storage space with lender regions. Block-level de-duplication can co-exist with storage architectures for thin provisioning and snapshot management. Lending maps can track redirected pointers from borrower regions to shared physical storage from lender regions. The lending maps can track the freed status of regions to support efficient write I/O operations without defaulting to unnecessary read-modify-write cycles to complete data writes. Redundancy of de-duplicated data can maintain one or more copies to support recovery from media errors. Candidate regions for de-duplication can be identified by monitoring the times and patterns of data access operations. A sampled mechanism for calculating and comparing signatures of data blocks can support the efficient identification of duplicated data within the storage system.Type: GrantFiled: November 19, 2008Date of Patent: May 20, 2014Assignee: American Megatrends, Inc.Inventors: Paresh Chatterjee, Srikumar Subramanian, Sharon Enoch, Raghavan Sowrirajan
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Patent number: 8725968Abstract: A storage section controlling apparatus includes a queuing section adapted to retain a processing order of write requests and readout requests from a data processing apparatus to plural storage sections to, and a processing order controlling section adapted to change, where a readout request for a target region of a duplexing process of a second storage section of the plural storage sections by a duplexing controlling section is issued from the data processing apparatus and a write request for a target region of at least one first storage section of the plural storage sections of a copying source corresponding to the target region of the readout request exists later than a processing turn of the readout request in a processing order in the queuing section, the processing turn of the readout request in the processing order so as to be later than the writing request in the processing order.Type: GrantFiled: January 13, 2010Date of Patent: May 13, 2014Assignee: Fujitsu LimitedInventor: Mihoko Wada
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Patent number: 8713241Abstract: The present invention discloses a portable computing device (100) including a processor (102), alternate memory (106), and a DRAM memory (108). Under normal operating conditions, providing full functionality of the device, a full code instantiation in the DRAM is executed, providing operating system, user interface and application execution functionality. A reduced code instantiation (114) which duplicates certain elements of the operating system, user interface, and application code is maintained in the low power memory. When a condition occurs that dictates or allows, execution is switched from the full code instantiation to the reduced code instantiation, and the DRAM is shut off.Type: GrantFiled: September 9, 2008Date of Patent: April 29, 2014Assignee: Wireless Silicon Group, LLCInventors: Jaime A. Borras, Jose M. Fernandez, Zaffer S. Merchant
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Patent number: 8677260Abstract: A user interface to an application processing complex data of multiple data view abstractions allows selection, placement, size and other configurable characteristics of interface components to be controlled by a user and then associated with the data abstraction and processing task. Multiple configurations may be created to simplify the interface to include only necessary controls given an abstraction level of the data view and the task on that data. The configurations may be stored using symbolic references and subsequently loaded on demand into the interface. Mechanisms may be applied to ensure that similarly referenced configurations in storage are resolved and only the desired configuration is applied.Type: GrantFiled: September 26, 2011Date of Patent: March 18, 2014Assignee: Cadence Design Systems, Inc.Inventor: Don O'Riordan
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Patent number: 8671246Abstract: An information processing system performs a prefetch for predicting data that is likely to be accessed by a central processing unit, reading the predicted data from a main memory, and storing the data in a cache area in advance. The information processing system includes a usage information storage unit that stores therein usage information indicating whether prefetched data has been accessed; and a usage information writing unit that writes the usage information of the prefetched data in the usage information storage unit.Type: GrantFiled: July 28, 2009Date of Patent: March 11, 2014Assignee: Fujitsu LimitedInventors: Takashi Toyoshima, Shuji Yamamura, Atsushi Mori, Takashi Aoki
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Patent number: 8667416Abstract: Functionality is implemented to determine that a first content presented by a first graphical user interface container is related to a second content presented by a second graphical user interface container. The first graphical user interface container and the second graphical user interface container are merged to generate a merged container that presents a merged content. The merged content comprises a first constituent content of the merged container that corresponds to the first content and a second constituent content of the merged container that corresponds to the second content. It is determined that a first action associated with the first constituent content can operate upon the second constituent content. The first action operates on the first constituent content when invoked. Computer program code that implements the first action is reconfigured to operate upon the first and the second constituent content of the merged container.Type: GrantFiled: April 12, 2010Date of Patent: March 4, 2014Assignee: International Business Machines CorporationInventors: Laurence England, Chenhong Xia
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Patent number: 8656131Abstract: The present invention provides for the expansion of a virtual storage device. Expansion of the virtual storage device includes adding one or more additional storage device units to an existing virtual storage device. Blocks or strips included in an added storage device unit are assigned addresses, to allow the added storage capacity to be accessed immediately. In order to reestablish a pattern of data storage addresses from the original storage device units of the pre-expanded virtual storage device across all of the storage device units of the post-expanded virtual storage device, temporary storage is provided. In particular, as a strip of data is relocated to its proper post-expand location, the data occupying that location is placed in a temporary storage buffer. Data in the temporary storage buffer is then written to the proper post-expand location for that data, with displaced data being written to a second temporary storage buffer.Type: GrantFiled: February 2, 2009Date of Patent: February 18, 2014Assignee: Dot Hill Systems CorporationInventor: Thomas George Wicklund
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Patent number: 8601202Abstract: Methods and systems to wear level a non-volatile memory device across partitions. In an embodiment, a memory device performs background operations to swap host addressable memory partitions with a spare memory partition outside of the host address space. In one embodiment, the background inter-partition wear leveling operations are appended to a user erase operations.Type: GrantFiled: August 26, 2009Date of Patent: December 3, 2013Assignee: Micron Technology, Inc.Inventors: Robert Melcher, Sean Eilert, Gerard Kreifels
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Patent number: 8572504Abstract: In an embodiment, degree of comprehensibility of a graphical representation of a model is identified. The model is provided in a graphical modeling environment. The degree of comprehensibility of the graphical representation of model is identified based at least in part on one or more visual characteristics of one or more elements in the model. The one or more elements in the model include at least one of entities in the model, or relationships in the model. The degree of comprehensibility assigned to the model is communicated, for example, to a user.Type: GrantFiled: December 9, 2010Date of Patent: October 29, 2013Assignee: The MathWorks, Inc.Inventors: Dave Aaron Forstot, Gregory Thomas Wolff, Jeffrey Paul Chapple
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Patent number: 8555004Abstract: It is desired to reduce the danger of leakage of data stored in a logical storage device. A storage system has a detection unit and a security processing unit. The detection unit detects a system change, during which it is not possible to perform I/O for a first logical storage device, among a plurality of logical storage devices in the storage system. And the security processing unit takes this type of system change as the opportunity for performing security processing, i.e. formatting or shredding, upon the first logical storage device.Type: GrantFiled: October 1, 2008Date of Patent: October 8, 2013Assignee: Hitachi Ltd.Inventors: Yutaka Kitagawa, Akira Ooigawa
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Patent number: 8510517Abstract: For betterment, by putting a virtual storage device into a suspend mode, physical resources are turned OFF on a virtual storage device basis. Moreover, control information and volume data of the virtual storage device are stored in any external volume, for example, and the resources that have been used by the virtual storage device are deallocated. At the time of resumption of operation, using any resources not in use, the virtual storage device is restored based on the control information in storage. When a change is made to a WWN on the side of a host, the storage device receives a WWN change notification from a management server, and makes settings again to a WWN table, thereby making it accessible from the host.Type: GrantFiled: November 17, 2008Date of Patent: August 13, 2013Assignee: Hitachi, Ltd.Inventors: Hiroaki Akutsu, Kazuyoshi Serizawa, Yoshiki Kano
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Patent number: 8489805Abstract: The present disclosure includes methods and devices for logical memory blocks. One method for operating a memory device includes receiving a command to operate X pages of the memory device, X being greater than Y, and executing the command by executing multiple subcommands, each subcommand operating on a logical memory block portion of the X pages, each logical memory block including at most Y pages. T is a timeout limit, N is a number of pages comprising a block of memory, and Y is number of pages that can be operated within time T.Type: GrantFiled: January 17, 2012Date of Patent: July 16, 2013Assignee: Micron Technology, Inc.Inventor: Ryan G. Fisher
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Patent number: 8423898Abstract: An apparatus and method for performing calculations is provided so that a paradigm of a tape is utilized in a calculator application that executes on a computing platform and which is configured to enable a user to see and interact with multiple virtual tapes that each show numerical values and operators. Each tape functions as a user-accessible memory and a memory value may be recalled from any one tape and that value placed on any other tape. The calculator application is configured to enable the user to enter a sequence of values and operators which are all displayable on a given tape, as well as support the user's ability to edit any value or operator that was previously entered on that tape. Calculations are updated to reflect the user's edits on both the tape currently being edited and any other tape that uses the edited tape as a memory.Type: GrantFiled: August 23, 2010Date of Patent: April 16, 2013Assignee: Hale Software Concepts, Inc.Inventors: Presley Eugene Hale, Daniel Eugene Hale, Brent Foust
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Patent number: 8423719Abstract: An apparatus includes a processor which issues a plurality of commands including an identifier for classifying each of the commands, a cache memory which includes a plurality of ways to store a data corresponding to a command, wherein the cache memory includes a register to store the identifier, the register corresponding to at least one of the ways being fixed, the fixed way exclusively storing the data corresponding to the identifier during which the register stores the identifier, a replacement controller which selects a replacement way based on a predetermined replacement algorithm in case of a cache miss, and excludes the fixed way from a candidate of the replacement way when the register corresponding to the fixed way stores the identifier.Type: GrantFiled: September 8, 2008Date of Patent: April 16, 2013Assignee: NEC CorporationInventor: Koji Kobayashi
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Patent number: 8386697Abstract: A memory managing method for a non-volatile memory and a controller using the same are disclosed. The controller includes a system wear leveling member for performing a first wear leveling process in a non-volatile memory for choosing a memory unit; and a subsystem wear leveling member for performing a second wear leveling process in the chosen memory unit for selecting a block from the chosen memory unit for data programming; whereby uneven use of the blocks of the chosen memory unit is avoided.Type: GrantFiled: September 9, 2008Date of Patent: February 26, 2013Assignee: Phison Electronics Corp.Inventor: Chih-Kang Yeh
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Patent number: 8386713Abstract: Disclosed herein is a memory apparatus comprising: a nonvolatile memory configured to allow data to be written thereto and read therefrom in units of a cluster and to permit data to be deleted therefrom in units of a block made up of a plurality of sectors; a control circuit configured to control access operations to said nonvolatile memory; a management area; a user data area; and a cache area; said management area includes a logical/physical table, and the addresses of physical blocks in said cache area.Type: GrantFiled: September 9, 2008Date of Patent: February 26, 2013Assignee: Sony CorporationInventors: Nobuhiro Kaneko, Kenichi Nakanishi
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Patent number: 8380948Abstract: Memory objects associated with a portion of a cache (e.g., data blocks of a media file) are assigned a value based on their importance to an application that is consuming memory objects. The values are used to assign the data blocks to purge groups. The purge groups are a labeling mechanism for determining a purge order. A memory object associated with a first data block assigned to a first purge group may be purged before a memory object associated with a second data block assigned to a second purge group. As new data blocks are received by the application (e.g., from disk or a network connection), the blocks are assigned a value and added to a purge group. In some cases, the data blocks arrive out of order (e.g., order of consumption). Memory objects can be reassigned to a different purge group when new data blocks are added or reclaimed.Type: GrantFiled: September 4, 2008Date of Patent: February 19, 2013Assignee: Apple Inc.Inventors: Heiko Gernot Albert Panther, James Michael Magee, John Samuel Bushell