Abstract: Inverter is modulated based on first, second, and third switching states determined according to a reference vector represented as a sum of a remainder vector connecting the reference vector with a first vertex of a modulation triangle and a set of vertex vectors connecting a center vertex of space vector diagram with the first vertex. A first switching state of the inverter at the first vertex is determined based on angles of vertex vectors in the set. A second switching state of the inverter at a second vertex of the modulation triangle and a third switching state of the inverter at a third vertex of the modulation triangle are determined based on the first switching state and the remainder vector.

Abstract: A grid tied inverter connectable to an electricity grid, the grid tied inverter comprising a DC to DC current fed push-pull converter operable to generate a current waveform from a DC voltage source, the current waveform being substantially synchronised to the electricity grid, and a transformer having a first side connected to the DC to DC current fed converter and a second side having an output line connectable to the grid.

Abstract: A method of operating a power factor correction (PFC) circuit and a corresponding power factor correction circuit include determining an adaptive switching frequency of the PFC circuit related to a current of the boost inductor of the PFC circuit, and operating the PFC circuit at a light load based on the adaptive switching frequency.

Abstract: A power converter including a rectifier stage connected to plural phases of a network delivering an input current at a determined fundamental frequency, a DC power supply bus and a bus capacitor connected to the DC power supply bus. The converter includes a controlled current source situated on the DC power supply bus, the current source making it possible to control a rectifier current, flowing on the DC power supply bus, and a controller for the controlled current source to control a rectifier current, flowing on the DC power supply bus. The controller is configured to implement a regulation loop into which are injected a first harmonic and a second harmonic synchronized respectively at six times and twelve times the fundamental frequency of the input current delivered by the network, the amplitude and phase of these harmonics being determined to limit the THDi and the PWHD.

Abstract: A voltage regulator circuitry (50) adapted to operate in a high-temperature environment of a turbine engine is provided. The voltage regulator may include a constant current source (52) including a first semiconductor switch (54) and a first resistor (56) connected between a gate terminal (G) and a source terminal (S) of the first semiconductor switch. A second resistor (58) is connected to the gate terminal of the first semiconductor switch (54) and to an electrical ground (64). The constant current source is coupled to generate a voltage reference across the second resistor 58. A source follower output stage 66 may include a second semiconductor switch (68) and a third resistor (58) connected between the electrical ground and a source terminal of the second semiconductor switch. The generated voltage reference is applied to a gating terminal of the second semiconductor switch (58).

Abstract: System and method for regulating a power conversion system. A system controller for regulating a power conversion system includes a first controller terminal and a second controller terminal. The system controller is configured to receive at least an input signal at the first controller terminal, and generate a gate drive signal at the second controller terminal based on at least information associated with the input signal to turn on or off a transistor in order to affect a current associated with a secondary winding of the power conversion system. The system controller is further configured to, if the input signal is larger than a first threshold, generate the gate drive signal at a first logic level to turn off the transistor.

Abstract: Disclosed is bandgap voltage reference generator having a programmable resistor. The programmable resistor can be programmed to provide a proper ratio between the PTAT current and the CTAT current to reduce the effect of process variations on the bandgap voltage. The bandgap voltage reference generator includes a calibration circuit that programs the programmable resistor.

Abstract: A control circuit includes: a first current generating circuit arranged for generating at least one output current according to a reference signal; a second current generating circuit arranged for generating a reference current corresponding to the reference signal according to the reference signal; and a follower circuit coupled to the second current generating circuit for generating a control current according to the reference current, and feeding back the control current to the first current generating circuit from the second current generating circuit in a signal-following manner to control the reference signal.

Abstract: A switching power supply device includes a switching power supply integrated circuit that includes a dead time generating unit that generates high-side and low-side drive signals having a dead time based on a PWM signal, a drive signal generating unit that generates first and second PWM signals based on the drive signals and a voltage of an output terminal, and a driver that includes high-side and low-side switch elements driven by the PWM signals; a filter that is connected to the output terminal; a first diode having a cathode connected to the source of the high-side switch element and an anode connected to the output terminal; and a second diode having a cathode connected to the source of the low-side switch element and an anode connected to the output terminal. The first and second diodes are arranged outside the switching power supply integrated circuit.

Abstract: A second control circuit is configured to switch a pulse signal to a level which turns off a second switching transistor when a coil current that flows through a primary winding reaches a predetermined threshold current. The second control circuit is configured to start a switching operation when a power supply for an electronic device is turned on, to set the threshold current to a first value when an intermediate voltage is higher than a predetermined level, and to set the threshold current to a second value that is lower than the first value when the intermediate voltage is lower than a predetermined level. A first control circuit is configured to start a switching operation upon receiving an instruction from a microcontroller to start operating.

Abstract: Disclosed is a DC-DC converter including: a switch unit controlling a flow of a current based on a buck-boost topology; a short circuit unit short circuited or opened according to an external setting to change a topology of the switch unit; an inductor storing a current induced by the switch unit; a topology selecting unit selecting a topology in response to an external input signal and generating a signal corresponding to the selected topology; a pulse width modulating unit generating a signal for determining an operation time of the switch unit; a reverse flow detecting unit detecting a reverse flow of a current flowing through the switch unit to generate a signal; and a switch control unit controlling the switch unit in response to signals of the topology selecting unit, the pulse width modulating unit and the reverse flow detecting unit.

Abstract: A novel integrated switched mode power supply circuit that provides supply voltages to an integrated circuit may be of minimal complexity and have the capacity for a wide range of input supply voltages. The novel power supply may include cascaded, unregulated step-down charge pumps (e.g. unregulated voltage splitters), one or more linear regulators coupled to the output of the cascaded voltage splitters, and a start-up current source to provide the IC supply current until the input supply voltage is sufficiently high for the voltage splitter(s) to be functional to provide the IC supply current. Furthermore, each voltage splitter may be activated or disabled depending on the value of the input supply voltage, and the input of a disabled voltage splitter may be shorted to its output via an integrated power switch. Using (cascaded) voltage splitters to provide the IC supply current reduces overall power dissipation in the IC.

Abstract: An apparatus is configured to provide a voltage rising at the output with a programmable slew rate. The apparatus comprises a ramp-up control circuit module for supplying an increasing output voltage that is output to a load circuit. The ramp-up control circuit comprises an amplifier that receives the output of a plurality of selectable mirrored current sources that build up voltage across a capacitor for programming a selected linear slew rate for the increasing output voltage. The apparatus further comprises a glitch filter circuit for stabilizing the increasing output voltage so as to minimize glitches, including current and voltage stress, in the output voltage.

Abstract: According to one embodiment, a synchronous buck converter comprises a multi-mode control circuit for detecting a load condition of a variable load, an output stage driven by the multi-mode control circuit, wherein the variable load is coupled to the output stage, and a feedback circuit connected between the output stage and the multi-mode control circuit. The multi-mode control circuit is configured to adjust a current provided by the output stage to the variable load based on the load condition. In one embodiment, the multi-mode control circuit selectably uses one of at least a first control mode and a second control mode according to the load condition, wherein the first control mode is a pulse-width modulation (PWM) mode selected for switching efficiency when the load condition is heavy and the second control mode is an adaptive ON-time (AOT) mode selected for switching efficiency when the load condition is light.

Abstract: A power supply current monitor comprising a processor operable to monitor a pulsed voltage signal generated by a power supply and generate an alert when a pulse width for the pulsed voltage signal is outside an expected pulse width range; wherein the pulse width is dependent on an amount of current being supplied to a load by the power supply.

Abstract: The invention disclosed buck power factor correction system. The system includes: a first storing device, for storing and discharging energy; a first converter device, coupled to the first storing device, for transferring and converting energy; a second storing device, coupled to the first storing device, for storing and discharging energy; and a second converter device, coupled to the second storing device, for transferring and converting energy.

Abstract: System and method for regulating a power converter. The system includes a comparator configured to receive a first signal and a second signal and generate a comparison signal based on at least information associated with the first signal and the second signal. The first signal is associated with at least an output current of a power converter. Additionally, the system includes a pulse-width-modulation generator configured to receive at least the comparison signal and generate a modulation signal based on at least information associated with the comparison signal, and a driver component configured to receive the modulation signal and output a drive signal to a switch to adjust a primary current flowing through a primary winding of the power converter. The modulation signal is associated with a modulation frequency corresponding to a modulation period.

Abstract: System and method for regulating a power converter. The system includes a first comparator configured to receive a first input signal and a second input signal and generate a first comparison signal based on at least information associated with the first input signal and the second input signal, a pulse-width-modulation generator configured to receive at least the first comparison signal and generate a modulation signal based on at least information associated with the first comparison signal, a driver component configured to receive the modulation signal and output a drive signal to a switch to adjust a primary current flowing through a primary winding of the power converter, and a voltage-change-rate detection component configured to sample the feedback signal to generate a first sampled signal for a first modulation period and to sample the feedback signal to generate a second sampled signal for a second modulation period.

Abstract: A multi-phase power block for a switching regulator includes a phase control circuit, N power cells and a current sharing control circuit. The phase control circuit is configured to receive a single phase PWM clock signal and generate N clock signals in N phases. Each of the N power cells includes a pair of power switches, gate drivers, a control circuit receiving one of the N clock signals and generating gate drive signals for the gate drivers, and an inductor. The current sharing control circuit is configured to assess the inductor current at the inductor of the N power cells and to generate duty cycle control signals for the N power cells. The duty cycle control signals are applied to the control circuits to adjust the duty cycle of one or more clock signals supplied to the power cells to balance a current loading among the N power cells.

Abstract: A regulator for providing a plurality of output voltages is provided. The regulator includes a basic unit and a plurality of replica units. The basic unit amplifies an input voltage to obtain a core voltage according to a first control signal. Each of the replica units outputs one of the output voltages according to the input voltage and one of a plurality of second control signals, wherein at least two of the output voltages have different voltage levels. The first control signal is set according to the second control signals, to make the voltage level of the core voltage substantially equal to or less than a maximum voltage level of the output voltages and substantially equal to or greater than a minimum voltage level of the output voltages.