Abstract: Apparatus and method for obtaining stable matching networks for plasma tools for use in the plasma processing industry. In an RF plasma apparatus, running at a matched condition for a transmission line and the plasma tool matching network such that the input impedance at the input to the transmission line is different than that of the output impedance of an RF generator and such that when the plasma density in the plasma tool decreases the input impedance will match the output impedance of the generator.

Abstract: A stacked power amplifier is provided in which an input signal is independently coupled to each of a series of amplifying devices in the stack. A transformer is used at the input circuit of each device to create an RF swing across each amplifying device which is substantially equal. This results in an equal distribution of RF and DC voltage among the devices in the stack.

Abstract: A current amplifier includes a cascode transistor for fixing the voltage of an input of the amplifier; a first constant current source connected between the input and a first supply voltage; a second constant current source, for providing a current lower than the first current source, connected between a second supply voltage and the cascode transistor; a second transistor, of different type than the cascode transistor, connected between the input and the second supply voltage, and controlled by the node between the cascode transistor and the second current source; and an output transistor of same type as the second transistor, connected to the second supply voltage and controlled by the node.

Abstract: A system for linearly transmitting an amplified output signal using predistortion is disclosed. The system uses a straight inverse modeling scheme to more easily and accurately determine the inverse of the distortion caused by a power amplifier of a RF transmitter. The direct inverse modeling scheme of the present invention indexes the LUT using the modulated input signals instead of the potentially noisier output signals, which helps to increase the accuracy of the predistortion. The predistorter system stores complex coefficients in the LUT, which are then used as the tap weights of a digital filter implementing the predistorter. Finally, the trainer uses a modified version of the power amplifier output signal. The modified power amplifier output signal has the in-band distortion removed from the power amplifier output signal.

Abstract: A feed-forward amplifier (600) has an error path (123) replaced by a feed-forward amplifier (603) in a nested feed-forward configuration. By replacing the error path (123) with the feed-forward amplifier (603), design parameters such as efficiency and power output which are difficult to achieve with the conventional error path (123) are easily achieved with the single loop feed-forward amplifier (603). In this configuration, the main path (613) of the feed-forward amplifier (603) is capable of operating in a more efficient Class AB mode while still operating over a large dynamic range with to provide a relatively constant gain/phase relationship, thus insuring good intermodulation performance. The error path (627) of the feed-forward amplifier (603) must still be biased Class A, but it's requirements are much less than those of a Class A error amplifier (124) in an un-nested configuration.

Abstract: A power delivery system (500) including a power splitter (502), a plurality of power amplifier modules (508) responsive to the power splitter (502), a power combiner (504), and a gateway controller (506) is provided. Each of the plurality of power amplifier modules (508) include an input switch (520), a variable attenuator (524), an RF power amplifier (526) responsive to the variable attenuator (524) and the input switch (520), an output switch (530) responsive to the RF power amplifier (526), and an alarm detector (532) for indicating an alarm condition of the RF power amplifier (526). The power combiner (504) is responsive to the plurality of power amplifier modules (508), and the gateway controller (506) is in communication with each of the plurality of power amplifier modules (508). The plurality of power amplifier modules controlled in accordance to whether a sleep criteria has been met.

Abstract: A current steering circuit diverts bias current from a differential current summing amplifier's front end when the differential input exceeds a safe threshold level, thus preventing the amplifier's output stage from being overdriven. Diverting the front end's bias currents also turns off transistors within the amplifier's front end and thus protects the front end from damage which may otherwise result from excessive input signals.

Abstract: An amplifier includes an amplifying circuit and bias current circuit. The bias current circuit includes a beta matching circuit which employs a temperature compensated current reference to develop a bias current for the amplifying circuit. The beta matching circuit is connected to track the current gains of transistors within the amplifying circuit and to thereby provide a temperature compensated bias current to the amplifying circuit. The bias current maintains a fixed bias point regardless of temperature-induced, or other, variations of the current gains of the amplifying circuit's transistors.

Abstract: A low-noise, low-distortion clamping scheme includes a bootstrapped voltage clamp and an R.sub.gm current clamp that provide superior overdrive protection when used together in a Class-AB feedback amplifier. The bootstrapped voltage clamp includes a transistor that is connected to a circuit node to be clamped. The transistor's base is bootstrapped to the node to maintain a constant V.sub.be when not clamping, to reduce the adverse effects of the junction capacitance C.sub.je which would normally vary with the node voltage and distort the signal at the node. Two such clamps provide positive and negative voltage limiting. The R.sub.gm current clamp is used in the input stage of a Class-AB feedback amplifier to limit the current through the resistor R.sub.gm that interconnects the current inputs of two transconductance amplifiers whenever the voltage drop across R.sub.gm increases to an unacceptable level.

Abstract: A line driver with positive feedback reduces the output signal amplitude excursion required for driving a communication line, and enables the driver's output impedance to be synthesized using a reduced component value, thereby achieving a reduction in power loss through the output resistor, while simultaneously matching the effective electrical value of the driver's output impedance to the line. The line driver includes an operational amplifier having differential polarity inputs and an output. An output resistor, whose value is a fraction of the line impedance, is coupled between the amplifier output and an output node coupled to the line. A negative feedback resistor is coupled between the amplifier output and an inverting input. A further resistor is coupled between the amplifier output and a non-inverting input.

Abstract: An apparatus and method of reducing a peak envelope power of a linear power amplifier (10) amplifying a plurality of channels is provided. The method includes the steps of measuring (104) the peak envelope power of the linear power amplifier, measuring a channel activity level (101) of each channel of the plurality of channels, and, when the peak envelope power exceeds a first threshold, changing (103, 106) at least one parameter of a channel of the plurality of channels having a channel activity level exceeding a second threshold to reduce the peak envelope power.

Abstract: An integrated circuit phase-locked loop includes a phase/frequency detector, a charge pump, and a voltage-controlled oscillator (VCO) which are coupled together in series. The VCO has first and second VCO control inputs, and has a VCO output which is coupled to the phase/frequency detector. An off-chip loop filter input is coupled between the charge pump and the first VCO control input for coupling to an off-chip loop filter. An on-chip loop filter is coupled between the first VCO control input and the second VCO control input. The VCO has a lower voltage-to-frequency gain from the first VCO control input to the VCO output than from the second VCO control input to the VCO output.

Abstract: An automatic gain control circuit for controlling the gain of an amplifier amplifying an ac signal is provided which includes a resistance circuit, a comparing circuit, a gain control determining circuit, and a gain controlling circuit. The resistance circuit includes a plurality of resistors connected in series through taps. The comparing circuit compares an output signal of the amplifier with reference upper and lower limit values to determine whether the output signal of the amplifier is within a desired amplitude range of the reference upper limit value to the reference lower limit value or not. The gain control determining circuit determines whether the output signal of the amplifier has exceeded the upper and lower limit values sequentially during a complete cycle thereof for determining whether the gain of the amplifier should be changed or not.

Abstract: An output amplifier having a non-linear signal response characteristic is linearized by selecting a preceding amplifier in a multistage amplifier network and providing feedforward overcorrection to the preceding amplifier to compensate for the non-linear signal response characteristics of the output amplifier.

Abstract: A high speed fully differential operational amplifier with fast settling time for switched capacitor applications includes a high gain active cascode applied to the operational amplifier's input stage transistors to improve the gain, provide a higher output impedance, and thus, reduce the Miller feedback gate drain capacitance of the input stage devices. This improves the speed of the amplifier. A biasing technique is used to keep the active cascodes biased during transient overload so that settling will not be adversely affected during the recovery of the cascodes. A pair of transistors are used to feed forward a fraction of the tail current to "keep-alive" the cascode transistors. In other words, the fraction of the tail current that is fed to the source of the cascode transistors via the keep-alive transistors effectively biases the active cascodes sufficiently so that they do not turn off completely during slewing.

Abstract: An amplifier for use in a MOS sensing array is disclosed. The amplifier includes an operational amplifier and a feedback capacitor. During an equalization period, the voltage between the output of the operational amplifier and the inverting input is equalized. During an amplification period, an input signal is applied and amplified by the combination of the operational amplifier and the feedback capacitor. Additionally, during the amplification period, the compensation capacitor of the operational amplifier is disabled.

Abstract: A delta-modulated magnitude amplifier is used to amplify the magnitude component of an RF power amplifier that employs envelope elimination and restoration. The delta-modulated amplifier introduces a smaller amount of non-linearity than traditional approaches, which are based upon pulse-width modulation. The disclosed technique can be implemented using switched-capacitor circuits in a standard MOS technology with only two external components, i.e., an inductor and a capacitor. Thus, the disclosed technique allows the implementation of an efficient and yet linear RF power amplifier using low-cost MOS technology.

Abstract: An operational amplifier circuit includes a differential operational amplifier and a common mode feedback circuit with first and second transistors (16 and 20) having source electrodes connected to first and second supply voltage conductors and drains coupled to first and second outputs of the operational amplifier, respectively. First and second capacitors (24 and 25) are connected in series between gate electrodes of the first and second transistors and have a common point connected to the first output. A first switch capacitor circuit periodically refreshes the first capacitor to a voltage equal to the average of the first and second supply conductor voltages minus first and second predetermined bias voltages, respectively. A second similar common mode feedback circuit is coupled to the second output a differential output voltage produced by the operational amplifier results in equal excursions of the first and second outputs on opposite sides of the common mode feedback signal.

Abstract: An AGC circuit varies a bandwidth of an input unit and accuracy of linearity of the AGC output. A first input unit converts a first input current into a first voltage. A second input unit, identical to the first input unit, converts a second input current into a second voltage. A variable constant current source generates first and second constant currents. The first constant current flows from the first input unit to the variable constant current source. The second constant current flows from the second input unit to the variable constant current source. The first and second constant currents are varied by a control signal supplied by an external signal source so that the bandwidths of the first and second input units are varied. The AGC output of the AGC circuit is calculated based on the first voltage and the second voltage.

Abstract: An oscillating device is disclosed including a first ring oscillator having at least three odd inverters connected in series, an input terminal of the first of the inverters being connected with an output terminal of the last of the inverters, and applying an output signal of the last inverter to a first buffer's input terminal, thus producing a signal of the first cycle; the first buffer connected with the output terminal of the first ring oscillator's last inverter, having at least two even inverters connected in series, and buffering an output signal of the last inverter to produce it to outside; a second ring oscillator having at least three odd delay devices connected in series, wherein a power supply of each delay device is connected with the output terminal of each of the first ring oscillator's corresponding inverters, and an output terminal of the last of the delay devices is connected with an input terminal of the first of the delay devices, thus producing a signal of the second cycle, larger than t