Abstract: An MOS RAM employing capacitive storage cells where each cell includes a refreshing network which receives an AC signal for refreshing is disclosed. The refreshing signal is applied to the refreshing network through a depletion mode device which acts as a variable capacitor. Lower capacitance is provided when one binary state is stored in the cell, thus preventing undesirable charge from being retained within the cell when the opposite binary state is written into the cell. The refreshing signal is completely asynchronous with memory timing signals; thus, the memory may be accessed at any time.

Abstract: An analog signal storage system wherein degenerate analog signal storage devices may be used for relatively long time analog data storage. A recirculating charge transfer device shift register is used to store the analog data and a variable gain amplifier is included in a recirculation path between the shift register output and input. The gain of this amplifier is periodically adjusted so as to maintain the overall loop gain of the system at unity. The gain control signal is produced by comparing the amplitudes of a reference signal pulse before and after propagation through the shift register. Based on this comparison, a control signal is generated and applied to adjust the gain of the variable gain amplifier in a sense tending to compensate for signal loss due to propagation through the shift register. The output of the shift register may be strobed to read out analog signal data for external utilization at a lower rate than the propagation rate through the shift register.