Abstract: A voltage converter comprises an input terminal receiving a DC input voltage, an output terminal outputting an output voltage, a first switch coupled between a first node and the input terminal, a second switch coupled between the input terminal and a second node, a first capacitor coupled between the first node and the second node, a third switch coupled between the second node and ground, a fourth switch coupled between a third node and ground, a first electrical device coupled between the third node and the input terminal, a load capacitor coupled between ground and the output terminal, a second electrical device coupled between the first node and the output terminal, a second capacitor coupled between the third node and a fourth node, a fifth switch coupled between the first node and the fourth node, and a sixth switch coupled between the second node and the fourth node.

Abstract: A power supply device includes two input ports, two output ports, a transformer having primary and secondary windings, a switch device, and a controller. The switch device includes a switching element connected in series with the primary winding, and a capacitor. The controller switches the switching element to energize the transformer and charge the capacitor. When an AC power failure such as instantaneous interruption occurs, energy stored in the capacitor is discharged to flow through the primary winding. Accordingly, the transformer is energized to maintain generating an output power from the power supply device for a certain time period. The capacitor is provided on a primary side of the transformer, generally higher voltage side, in the power supply device, so that a smaller capacitance of the capacitor can be used.

Abstract: An apparatus and method for detecting battery pack voltage is disclosed. The voltage detection apparatus includes a plurality of selectors for providing a cell voltage of a predetermined cell, a detector buffer for receiving the cell voltage of the predetermined cell and supplying an intermediate voltage, a data process circuit for processing the intermediate voltage to acquire a voltage value indicative of the cell voltage of the predetermined cell, wherein each selector includes a plurality of switches and a plurality of level shifters, each switch being controlled by one of the plurality of level shifters to operate with a safe gate-source voltage, source-bulk voltage and reverse-biased body diode.

Abstract: A state-of-charge (SOC) estimating device and method for a secondary battery that estimates the SOC of the battery with high precision when variation takes place in the parameters of the battery model, even if the input current is constant. A first SOC estimating part estimates the open-circuit voltage by estimating the battery parameters en bloc using an adaptive digital filter computing treatment from the measurement values of the current and the terminal voltage and computes a first estimated SOC of the secondary battery from the open-circuit voltage and a predetermined relationship between the open-circuit voltage and the SOC. A second SOC estimating part computes a second estimated SOC by means of current-integration. State-of-charge estimated value-selecting part selects the second SOC value as when the current is constant and otherwise selects the first SOC value.

Abstract: A PWM signal generation circuit and a PWM control circuit are provided in which the duty ratio is easily changed and which can also avoid adverse impact from ambient temperature changes and the like. At the beginning of charging a capacitor with a current flow, a voltage level at a connection point between the negative input terminal of a comparator and the capacitor is still below a charging threshold. When the charging threshold is exceeded, the comparator is inverted to a low state and a current flows into an output point of the comparator to start discharging the capacitor. At the beginning of discharging from the capacitor, the voltage level at the connection point is still above the discharging threshold. However, when the voltage level falls below the discharging threshold, the comparator returns to a high state, and the charging operation again takes over.

Abstract: Control loops in a voltage regulator can be stabilized using minimal silicon area. A current limit signal, generated by a current limit control loop in the voltage regulator, can be divided to minimize a zero provided in a compensation set associated with a voltage control loop, thereby stabilizing both loops. The compensation set can include a resistor (the zero) and a capacitor (a pole) connected in series between output and input terminals of an amplifier. Dividing the current limit signal can include injecting a first portion of the current limit signal on a first side of the resistor and injecting a second portion of the current limit signal on a second side of the resistor. The ratio of the first and second portions can be based on a gain of the amplifier, thereby minimizing an effect of the resistor.

Abstract: A current detection circuit of the present invention has a switching device 1; an auxiliary switching device 2; an offset voltage source comprising an offset resistor device 7 and a current source circuit 8; a compensation circuit, comprising a differential amplifier 4 and a compensation transistor 5, for adjusting the output current of the auxiliary switching device 2 so that the potential obtained by subtracting the voltage drop across the offset resistor device 7 from the output potential of the switching device 1 is equal to the output potential of the auxiliary switching device 2, being configured that the detection level of the current flowing in the switching device 1 is shifted by an offset amount.

Abstract: In the PWM circuit of the present invention, a PWM counter counts clock signals. A reference value setting register sets a comparative reference value for determining a duty ratio of a PWM signal. A comparator generates the PWM signals based on a comparative result of the comparative reference value and a count value of the PWM counter. A delay device delays the PWM signal. A switching device switchably outputs the output of the comparator and the output of the delay device in order of time sequence. Thereby, the pulse phase of the PWM signal can be adjusted.

Abstract: A low drop out (LDO) regulator that includes a novel error amplifier, which is arranged with a first stage that employs both NMOS and PMOS devices that are similarly doped in differential pairs and a second stage that operates with NMOS and PMOS devices in a push-pull arrangement. In addition to the error amplifier, the LDO regulator can also include a startup circuit coupled to an enable voltage, a reference filter circuit coupled to a reference voltage, an output circuit, a quiescent current control circuit, and a pulse generator circuit. Also, an internal RC network is provided to compensate for phase shift. The integrated operation of the components of the regulator enables stable and fast operation of an LDO regulator with no external capacitors connected to the input or output terminals.

Abstract: A circuit includes a converter for converting an a.c. voltage into a d.c. voltage. The converter has a diode half-bridge, a switch half-bridge, and two d.c. rails. Further, the converter has a second converter for converting the a.c. voltage into a second d.c. voltage.

Abstract: A transition mode operating device for the correction of the power factor in switching power supply units includes a converter for receiving an input voltage and for providing a regulated output voltage, and a coupled control device. The converter includes a power transistor, a rectifier, and an inductor and auxiliary winding arranged between the rectifier and a power transistor. The control device includes a circuit for generating an error signal, a multiplier for receiving the error signal, and a driving circuit coupled to the multiplier to determine the on time period and the off time period of the power transistor. The control device includes circuitry coupled to the auxiliary winding of the inductor to generate a signal proportional to the input voltage during the on time of said power transistor.

Abstract: When a step-up ratio control circuit sets a step-up ratio of a charge pump circuit to 1.0 to enable a short mode, a path inside the charge pump circuit is short-circuited and a first transistor is completely turned on. This produces an inrush current derived from a battery voltage of a lithium ion battery flowing into the charge pump circuit. To address this, a constant current circuit is operated so that the first transistor is turned on slowly. Further, the operation of an oscillator and an operational amplifier is suspended when the short mode is enabled.

Abstract: A pulse width modulation (PWM) controlling module, includes: a PWM controller, a load detector, and an adjusting module. The PWM controller generates a PWM signal that is utilized for controlling a supply voltage applied to an electronic system. The load detector, coupled to the PWM controller, detects a load of the electronic system according to the PWM signal and generates a decision value accordingly. The adjusting module, coupled to the PWM controller and the load detector, controls the PWM controller to adjust the PWM signal according to the decision value.

Abstract: A power factor is improved using a simplified structure without particularly providing a power factor improving circuit, and high efficiency is obtained.