Abstract: A recording apparatus having an image reading operation capable of performing image reading by an image reading device for converting image information into electrical signals, and an image recording operation by a recording device for forming an image onto a recording medium is disclosed. The recording apparatus comprises a mounting unit capable of mounting both the image reading device and the recording device, a sensor for sensing which one of the image reading device and the recording device is mounted on the mounting unit, a quality preserving section for preserving the image quality in the recording operation, and a controller for controlling the reading operation by the image reading device, the recording operation by the recording device, and the quality preserving operations. The controller disenables the quality preserving operations by the quality preserving section, when the result sensed by the sensor indicates that the image reading device is mounted on the mounting unit.

Abstract: An OFF-state voltage generating circuit regulates an OFF-state voltage level, for thin film transistors (TFT) in a liquid crystal display (LCD). A voltage generator receives a common voltage signal and an inverted common voltage signal and generates an OFF-state voltage to turn off the TFT of an LCD. A voltage regulator adjusts the level of the voltage from the voltage generator by varying the resistance of a variable resistor. A timing circuit keeps the voltage regulator from operating for a time during the initial ON-state of the power supply.

Abstract: A soft switched PWM AC to DC power converter for a DC power supply is disclosed. The power supply includes a power factor corrector (PFC) converter with a power boost topology, a DC/DC converter with a forward topology and a fly-back converter which serves as an auxiliary power supply for the controller components. The three converters are synchronized by a gate array logic (GAL) IC to minimize EMI noise. The GAL also conditions the PWM for the PFC and the DC/DC converter to provide very precise switching control. Synchronizing and PWM timing signals are derived by the GAL using a high-speed clock signal that is input to the GAL as a data input. The clock signal is repeatedly divided using synchronous division to yield a digital monostable timing signal that enables very precise control of converter switches.

Abstract: A pattern generator is responsive to a control signal so as to change a pulse signal pattern selectively supplied through a level-shift circuit to switching elements of a charge-pump circuit, and the switching elements cause boosting capacitors to be differently charged depending upon the pulse signal pattern so that all the boosting capacitors participate in the boosting operation regardless of the target ratio between the input potential and the output potential.

Abstract: Dual interleaved DC to DC switching circuits realizable in an integrated circuit form, capable of monitoring individual inductor current using only one current sense resistor and providing automatic duty cycle adjustment to keep the inductor currents in the interleaved DC to DC switching circuits balanced. The preferred embodiment includes a gain error amplifier, an integral error amplifier, and a differentiator error amplifier and circuits for controlling the nominal duty cycle, with the gain error amplifier, integral error amplifier and differentiator error amplifier being adjustable independently by external components. The circuit further includes a high speed load regulation circuit that momentarily overrides the control circuitry to take over control of the interleaved converters during sudden load changes, such control also being programmable.

Abstract: A print head of this invention has a plurality of heater boards, and each heater board has a plurality of heating resistors, driver circuits corresponding to the heating resistors, one shiftregister for inputting serial data, a data latch circuit for latching print data input from the shift register, a pre-heat data latch circuit for latching selection data of selecting one or several of pre-heat signals input from the shift register, and a pre-heat selection circuit for selecting one or a plurality of pre-heat signals in accordance with the selection data latched in the pre-heat data latch circuit. In a print operation, one or several of the plurality of input pre-heat signals are selected to pre-heat the heating resistors, and when a main heat signal is input thereafter, the heating resistors are driven in accordance with the print data latched by the data latch circuit, thus performing the print operation.

Abstract: A MOSFET, an op-amp, a comparator circuit, and voltage dividers with capacitors are employed in combination to effectuate a soft-start switch with current limiting. The transconductance of the MOSFET is employed so that no sense resistor is required. The MOSFET and op-amp are configured as a closed-loop feedback circuit in which the output of the op-amp is coupled to the gate of the MOSFET and the inverting input of the op-amp is coupled to the output of the soft-start switch via a voltage divider. A first RC circuit provides a voltage to the non-inverting input of the op-amp which can be triggered to gradually rise from a value close to zero to some reference voltage so as to soft-start a load. Current limiting means are effectuated by a comparator circuit and voltage dividers with capacitors.

Abstract: A single-fault tolerant DC-to-DC converter having an output voltage clamp is capable of sourcing current to and sinking current from a load while maintaining a well regulated secondary bus voltage V.sub.bus. The clamp is disabled when the DC-to-DC converter is sourcing current so that all of the current is delivered to the load and is enabled when V.sub.bus exceeds a clamp set point voltage V.sub.clamp to sink the excess current and clamp V.sub.bus at V.sub.clamp. To provide single fault tolerance, the clamp includes a fault detection clamp element that is controlled by the DC-to-DC converter so that they operate mutually exclusively and a regulator clamp element whose resistance is set in a negative feedback control loop so that, when the fault protection clamp element is activated, both clamp elements sink the excess current and control the secondary bus voltage.

Abstract: Known converters for converting a d.c. voltage at their input to a rectifiable a.c. voltage at the output operate reliably with very small input voltage fluctuations and relatively small fluctuations in load. In order to increase the range of input voltages and loads, it is proposed that a full-bridge converter with filter capacitors in one bridge branch be operated under low-load conditions as a half bridge, such that the capacitors form the midpoint of the half bridge, and under high-load conditions to change to full-bridge operation.

Abstract: A switched-mode power supply circuit includes a first controller for controlling power to a main power output through a first transformer, and a second controller for controlling power to a control output through a second transformer. In order to effect a very low power stand-by mode, the second controller turns off the first controller, the second controller only operating. When a load is selectively coupled across the control output, the second controller detects this load and turns on the first controller thereby effecting the operating mode.

Abstract: Magnetic-free DC/DC converters, methods of operation thereof and a computer system employing at least one converter. In one embodiment, the converter includes: (1) an input capacitor coupled to a DC input of the converter, (2) a first switch coupled between the input capacitor and an output of the converter to transfer electrical power from the DC input to the output when the first switch is closed, (3) an output capacitor coupled in parallel with the output of the converter, (4) a second switch coupled in parallel with the input capacitor to short the input capacitor when the second switch is closed and (5) a switching controller circuit, coupled to the first and second switches, that provides complementary control signals to the first and second switches that are a function of an output voltage of the converter.

Abstract: An integrated circuit card, such as PC Card, is provided in which a step-down converter in the form of a switching regulator provides a stable operating voltage at increased current beyond what is normally available from a single source. In particular, a quiet and stable power supply is obtained by modifying the standard configuration of a switching regulator such that the catch diode, or free-wheeling diode, instead of being connected to ground at the non-blocking terminal, is connected to a primary voltage source approximating the desired output voltage. If the desired output voltage is 5V, for example, the catch diode may be connected to Vcc supplied by a PC Card slot, which nominally supplies 5V. The block terminal of the catch diode is connected through the switch of the switching regulator to a higher, supplementary, voltage source, e.g. Vpp=12V in the case of a PC Card slot.

Abstract: The invention provides a stabilized power converter having an input voltage and an output voltage, where the stabilized converter operates similar to a conventional converter under normal conditions, and operates continuously at the maximum power transfer point during overload conditions. The stabilized converter comprises a voltage control loop for regulating output voltage, and a stabilization loop for regulating input voltage. In a preferred embodiment, the stabilization loop senses the input voltage to the stabilized converter and compares it to a reference voltage. Whenever converter input voltage is above the maximum power transfer voltage, no action is taken by the stabilization loop, and the converter operates in the conventional manner. As converter input voltage approaches the maximum power transfer voltage, converter output voltage and corresponding converter input and output power are reduced to compensate.

Abstract: Disclosed is a new single-phase passive harmonic filter for one or more nonlinear loads. The filter improves the total system performance by drastically reducing the line side current harmonics generated by nonlinear loads. The filter includes single-phase integrated inductances with an appropriately placed tap across which is connected a tuning capacitor. The combination of the inductance up to the tap position and the tuning capacitor form a series tuned filter configuration while the remainder of the integrated inductance is used for harmonic attenuation. A shunt capacitor is employed for shunting higher order harmonic components. A single-phase passive voltage regulator provides the needed voltage bucking to prevent over voltage at the load terminals of the filter. The filter provides an alternate path for the harmonic currents generated by nonlinear loads.

Abstract: An impedance regulator system and method which offers a large effective high-frequency block to isolate RF signals transmitted on power lines is presented. High-current inductors in series are inductively coupled over the RF band to physically smaller, low-current coupling inductors. The coupling inductors induce a degenerative or canceling at RF frequencies in the high-current inductors, resulting in the effective inductor increase and hence higher impedance over the RF band.

Abstract: The present invention relates to a supply circuit having a storage capacitor, including, across a rectifying bridge, a storage capacitor associated with a charge path and with a discharge path, the charge path including a current limiter on a determined value and controllable according to the voltage across the rectifying bridge and to the voltage across the storage capacitor, whereby the storage capacitor charges with a substantially constant current during each of its charge phases.

Abstract: The subject invention describes a method of generating high frequency power. Although it can be used for any purpose it is primarily developed for the operation of fluorescent lamps. The inventive device utilizes a circuit that contains only a small percentage of the electronic complements normally associated with electronic fluorescent lighting ballasts. The circuit is such that dimming of the florescent lamp is easily accomplished. Also disclosed is a method of assembly which combined with the very little parts count produces an electronic ballast, which can be price competitive with the conventional magnetic ballast.

Abstract: A power-down circuit includes a power-on reset circuit that determines whether the supplied power falls below a prescribed level and, in response, outputs a reset signal for at least a prescribed period of time. A power supply latching circuit is responsive to the power-on reset circuit for switching on a power supply switching circuit to supply power from a power supply when the reset signal is not output. A power-down shutdown circuit, preferably under software control, and a power cutoff circuit, may be coupled to the power supply latching circuit, or alternatively the power-on reset circuit, for shutting down the power supplied from the power supply.

Abstract: Power supplied from a battery power supply to a load through a power conversion unit is maximized with a relatively simple arrangement and a small processing load. In addition, an output command value for controlling the power conversion unit is detected, a set voltage for which the output command value is maximized is calculated with reference to a past or present set voltage, as needed, and set as the next set voltage such that the maximum output is supplied to the load without any erroneous operation in the case of variation in solar radiation. In this case, a plurality of voltages are sequentially set for a relatively short period. Output command values for the respective set voltages are fetched while setting the same voltage at the start and end of the operation. A variation in output command value caused by the fetching difference for the same set voltage is detected. The output command value for calculating the next set voltage is corrected in accordance with this variation.

Abstract: A pulse timer circuit comprising a monostable multivibrator which includes two complementary transistors Q5, Q6, has the advantage of good tolerance to temperature fluctuation owing to the provision of a Schottky diode D4 connected between the emitter and base of one of the transistors Q5. The Schottky diode, D4, which has a temperature coefficient matched to that of the transistor Q5, ensures that the output pulse width from the monostable is unaffected by fluctuations in ambient temperature.