Patents Examined by Su Kim
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Patent number: 8969885Abstract: Disclosed herein is a light emitting device module comprising: a heat transfer member having a cavity; first conductive layer and second conductive layer contacting the heat transfer member via an insulating layer, the first conductive layer and the second conductive layer being electrically isolated from each other in accordance with exposure of the insulating layer or exposure of the heat transfer member; and at least one light emitting diode electrically connected to the first conductive layer and second conductive layer, the at least one light emitting device is thermally contacted to an exposed portion of the heat transfer member, wherein the heat transfer member has an exposed portion disposed within the cavity between the first conductive layer and the second conductive layer.Type: GrantFiled: September 23, 2011Date of Patent: March 3, 2015Assignee: LG Innotek Co., Ltd.Inventors: Gun Kyo Lee, Nam Seok Oh, Young Hun Ryu
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Patent number: 8957442Abstract: A technique of manufacturing a display device with high productivity is provided. In addition, a high-definition display device with high color purity is provided. By adjusting the optical path length between an electrode having a reflective property and a light-emitting layer by the central wavelength of a wavelength range of light passing through a color filter layer, the high-definition display device with high color purity is provided without performing selective deposition of light-emitting layers. In a light-emitting element, a plurality of light-emitting layers emitting light of different colors are stacked. The closer the light-emitting layer is positioned to the electrode having a reflective property, the shorter the wavelength of light emitted from the light-emitting layer is.Type: GrantFiled: February 8, 2012Date of Patent: February 17, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Satoshi Seo, Toshiki Sasaki, Nobuharu Ohsawa, Takahiro Ushikubo, Shunpei Yamazaki
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Patent number: 8952400Abstract: A light emitting diode is disclosed. The disclosed light emitting diode includes a light emitting structure including a first-conductivity-type semiconductor layer, an active layer, and a second-conductivity-type semiconductor layer. The first-conductivity-type semiconductor layer, active layer, and second-conductivity-type semiconductor layer are disposed to be adjacent to one another in a same direction. The active layer includes well and barrier layers alternately stacked at least one time. The well layer has a narrower energy bandgap than the barrier layer. The light emitting diode also includes a mask layer disposed in the first-conductivity-type semiconductor layer, a first electrode disposed on the first-conductivity-type semiconductor layer, and a second electrode disposed on the second-conductivity-type semiconductor layer. The first-conductivity-type semiconductor layer is formed with at least one recess portion.Type: GrantFiled: December 14, 2011Date of Patent: February 10, 2015Assignee: LG Innotek Co., Ltd.Inventors: Myung Hoon Jung, Hyun chul Lim, Sul Hee Kim, Rak Jun Choi
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Patent number: 8952432Abstract: Disclosed herein is a solid-state imaging device including a photoelectric conversion element operable to generate electric charge according to the amount of incident light and to accumulate the electric charge in the inside thereof, an electric-charge holding region in which the electric charge generated through photoelectric conversion by the photoelectric conversion element is held until read out, and a transfer gate having a complete transfer path through which the electric charge accumulated in the photoelectric conversion element is completely transferred into the electric-charge holding region, and an intermediate transfer path through which the electric charge generated by the photoelectric conversion element during an exposure period and being in excess of a predetermined charge amount is transferred into the electric-charge holding region. The complete transfer path and the intermediate transfer path are formed in different regions.Type: GrantFiled: March 17, 2011Date of Patent: February 10, 2015Assignee: Sony CorporationInventors: Yusuke Oike, Takahiro Kawamura, Shinya Yamakawa, Ikuhiro Yamamura, Takashi Machida, Yasunori Sogoh, Naoki Saka
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Patent number: 8946795Abstract: Embodiments of a pixel including a photosensitive region formed in a surface of a substrate and an overflow drain formed in the surface of the substrate at a distance from the photosensitive area, an electrical bias of the overflow drain being variable and controllable. Embodiments of a pixel including a photosensitive region formed in a surface of a substrate, a source-follower transistor coupled to the photosensitive region, the source-follower transistor including a drain, and a doped bridge coupling the photosensitive region to the drain of the source-follower transistor.Type: GrantFiled: March 17, 2011Date of Patent: February 3, 2015Assignee: OmniVision Technologies, Inc.Inventors: Gang Chen, Sing-Chung Hu, Duli Mao, Hsin-Chih Tai, Yin Qian, Vincent Venezia, Rongsheng Yang, Howard E. Rhodes
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Patent number: 8946731Abstract: Spalling is employed to generate a single crystalline semiconductor layer. Complementary metal oxide semiconductor (CMOS) logic and memory devices are formed on a single crystalline semiconductor substrate prior to spalling. Organic light emitting diode (OLED) driving circuitry, solar cells, sensors, batteries and the like can be formed prior to, or after, spalling. The spalled single crystalline semiconductor layer can be transferred to a substrate. OLED displays can be formed into the spalled single crystalline semiconductor layer to achieve a structure including an OLED display with semiconductor driving circuitry and other functions integrated on the single crystalline semiconductor layer.Type: GrantFiled: October 23, 2012Date of Patent: February 3, 2015Assignee: International Business Machines CorporationInventors: Ning Li, Devendra K. Sadana
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Patent number: 8946737Abstract: A light emitting diode (LED) includes a substrate, a buffer layer and an epitaxial structure. The substrate has a first surface with a patterning structure formed thereon. The patterning structure includes a plurality of projections. The buffer layer is arranged on the first surface of the substrate. The epitaxial structure is arranged on the buffer layer. The epitaxial structure includes a first semiconductor layer, an active layer and a second semiconductor layer arranged on the buffer layer in sequence. The first semiconductor layer has a second surface attached to the active layer. A distance between a peak of each the projections and the second surface of the first semiconductor layer is ranged from 0.5 ?m to 2.5 ?m.Type: GrantFiled: August 8, 2012Date of Patent: February 3, 2015Assignee: Advanced Optoelectronic Technology, Inc.Inventors: Ya-Wen Lin, Po-Min Tu, Shih-Cheng Huang, Chia-Hung Huang, Shun-Kuei Yang
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Patent number: 8940574Abstract: A method includes forming a plurality of image sensors on a front side of a semiconductor substrate, and forming a dielectric layer on a backside of the semiconductor substrate. The dielectric layer is over the semiconductor substrate. The dielectric layer is patterned into a plurality of grid-filling regions, wherein each of the plurality of grid-filling regions overlaps one of the plurality of image sensors. A metal layer is formed on top surfaces and sidewalls of the plurality of grid-filling regions. The metal layer is etched to remove horizontal portions of the metal layer, wherein vertical portions of the metal layer remain after the step of etching to form a metal grid. A transparent material is filled into grid openings of the metal grid.Type: GrantFiled: April 17, 2012Date of Patent: January 27, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Chien Wang, Chu-Wei Chang, Wang-Pen Mo, Hung-Chang Hsieh
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Patent number: 8936950Abstract: To improve light emission efficiency and reliability. A transparent conductive film 10 is formed on an entire top surface of a second semiconductor layer 108, and a photo-resist is applied thereon. When removing the photo-resist on the upper surface corresponding to an electrode forming part 16 of a first semiconductor layer 104, the photo-resist is removed to be gradually thinned at a boundary of a portion to be removed. The transparent conductive film is wet etched using the remaining photo-resist as a mask to expose a part of the second semiconductor layer. Dry etching is performed using the remaining photo-resist and the transparent conductive film as a mask to expose the electrode forming part of the first semiconductor layer. A portion of the transparent conductive film exposed in the dry etching using the remaining photo-resist as a mask is wet etched. The remaining photo-resist is eliminated.Type: GrantFiled: March 14, 2011Date of Patent: January 20, 2015Assignee: Toyoda Gosei Co., Ltd.Inventors: Naoki Nakajo, Masao Kamiya, Akihiro Honma
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Patent number: 8932933Abstract: A method of forming a hydrophobic surface on a semiconductor device structure. The method comprises forming at least one structure having at least one exposed surface comprising titanium atoms. The at least one exposed surface of at least one structure is contacted with at least one of an organo-phosphonic acid and an organo-phosphoric acid to form a material having a hydrophobic surface on the at least one exposed surface of the least one structure. A method of forming a semiconductor device structure and a semiconductor device structure are also described.Type: GrantFiled: May 4, 2012Date of Patent: January 13, 2015Assignee: Micron Technology, Inc.Inventors: Ian C. Laboriante, Prashant Raghu
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Patent number: 8927965Abstract: A light-receiving element includes a III-V group compound semiconductor substrate, a light-receiving layer having a type II multi-quantum well structure disposed on the substrate, and a type I wavelength region reduction means for reducing light in a wavelength region of type I absorption in the type II multi-quantum well structure disposed on a light incident surface or between the light incident surface and the light-receiving layer.Type: GrantFiled: March 14, 2013Date of Patent: January 6, 2015Assignee: Sumitomo Electric Industries, Ltd.Inventors: Yasuhiro Iguchi, Hiroshi Inada
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Patent number: 8928014Abstract: In accordance with certain embodiments, an electric device includes a flexible substrate having first and second conductive traces on a first surface thereof and separated by a gap therebetween, an electronic component spanning the gap, and a stiffener configured to substantially prevent flexing of the substrate proximate the gap during flexing of the substrate.Type: GrantFiled: August 12, 2013Date of Patent: January 6, 2015Assignee: Cooledge Lighting Inc.Inventors: Michael A. Tischler, Paul Palfreyman, Philippe M. Schick
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Patent number: 8916887Abstract: A light emitting device package of the embodiment includes a body including cavities; first and second lead electrodes disposed in the cavity of the body; a light emitting device disposed in the cavities, electrically connected to at least one of the first and second lead electrodes and emitting a first main peak wavelength in the range of 410˜460 nm; and a first resin layer having first phosphor on the light emitting device, wherein the first phosphor of the first resin layer emits light of a second main peak wavelength in the range of 461 nm˜480 nm by exciting some light having the first main peak wavelength, and the first and second main peak wavelengths have the wavelength different from each other and contain the light having the same color.Type: GrantFiled: February 8, 2012Date of Patent: December 23, 2014Assignee: LG Innotek Co., Ltd.Inventor: Tae Jin Kim
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Patent number: 8911518Abstract: The present disclosure relates generally to semiconductor techniques. More specifically, embodiments of the present disclosure provide methods for efficiently dicing substrates containing gallium and nitrogen material. Additionally, the present disclosure provides techniques resulting in an optical device comprising a substrate having a dislocation bundle center being used as a conductive region for a contact.Type: GrantFiled: June 7, 2012Date of Patent: December 16, 2014Assignee: Soraa, Inc.Inventors: Arpan Chakraborty, Michael R. Krames, Tal Margalith, Rafael Aldaz
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Patent number: 8912532Abstract: The invention relates to a top-emissive organic light-emitting diode (OLED) (10) arranged to emit light having different emission colors, comprising a multi-layered structure provided with a first electrode, a second electrode and a functional layer enabling light emission disposed between the first electrode and the second electrode, wherein thickness (H1, H2) of the functional layer is modulated by allowing at least a portion of the functional layer to interact with a thickness modulator (5a, 5b, 5c), wherein the functional layer comprises a hole injection layer or the electron injection layer.Type: GrantFiled: April 7, 2010Date of Patent: December 16, 2014Assignee: Nederlandse Organisatie voor toegepast-natuurwetenschappelijk onderzoek TNOInventors: Dorothee Christine Hermes, Joanne Sarah Wilson, Petrus Alexander Rensing
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Patent number: 8912033Abstract: Provided is a method of fabricating a light-emitting diode (LED) device. The method includes providing a substrate having opposite first and second sides. A semiconductor layer is formed on the first side of the substrate. The method includes forming a photoresist layer over the semiconductor layer. The method includes patterning the photoresist layer into a plurality of photoresist components. The photoresist components are separated by openings. The method includes filling the openings with a plurality of thermally conductive components. The method includes separating the semiconductor layer into a plurality of dies using a radiation process that is performed to the substrate from the second side. Each of the first regions of the substrate is aligned with one of the conductive components.Type: GrantFiled: October 8, 2010Date of Patent: December 16, 2014Assignee: TSMC Solid State Lighting Ltd.Inventors: Hsing-Kuo Hsia, Chih-Kuang Yu, Gordon Kuo
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Patent number: 8912653Abstract: A semiconductor wafer has integrated circuits formed thereon and a top passivation layer applied. The passivation layer is patterned and selectively etched to expose contact pads on each semiconductor die. The wafer is exposed to ionized gas causing the upper surface of passivation layer to roughen and to slightly roughen the upper surface of the contact pads. The wafer is cut to form a plurality of semiconductor dies each with a roughened passivation layer. The plurality of semiconductor dies are placed on an adhesive layer and a reconstituted wafer formed. Redistribution layers are formed to complete the semiconductor package having electrical contacts for establishing electrical connections external to the semiconductor package, after which the wafer is singulated to separate the dice.Type: GrantFiled: December 15, 2011Date of Patent: December 16, 2014Assignee: STMicroelectronics Pte Ltd.Inventors: Kah Wee Gan, Yonggang Jin, Anandan Ramasamy, Yun Liu
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Patent number: 8907463Abstract: A semiconductor device comprising a plurality of semiconductor chips and a plurality of through-line groups is disclosed. Each of the through-line groups consists of a unique number of through-lines. The numbers associated with the through-line groups are mutually coprime to each other. When one of the through-lines is selected for the each through-line group, one of the semiconductor chip is designated by a combination of the selected through-lines of the plurality of the through-line groups.Type: GrantFiled: April 26, 2011Date of Patent: December 9, 2014Assignee: PS4 Luxco S.a.r.l.Inventors: Kayoko Shibata, Hiroaki Ikeda
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Patent number: 8901586Abstract: Disclosed are a light emitting device and a method of manufacturing the same. The light emitting device includes a substrate; a light emitting structure disposed on the substrate and having a stack structure in which a first conductivity type semiconductor layer, an active layer and a second conductivity type semiconductor layer are stacked; a lens disposed on the light emitting structure; and a first terminal portion and a second terminal portion electrically connected to the first conductivity type semiconductor layer and the second conductivity type semiconductor layer, respectively. At least one of the first and second terminal portions extends from a top surface of the light emitting structure along respective side surfaces of the light emitting structure and the substrate.Type: GrantFiled: July 12, 2011Date of Patent: December 2, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Hak Hwan Kim, Ho Sun Paek, Hyung Kun Kim, Sung Kyong Oh, Jong In Yang
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Patent number: 8901720Abstract: A method of forming multiple conductive structures in a semiconductor device includes forming spacers adjacent side surfaces of a mask, where the mask and the spacers are formed on a conductive layer. The method also includes etching at least one trench in a portion of the conductive layer not covered by the spacers or the mask. The method may further include depositing a material over the semiconductor device, removing the mask and etching the conductive layer to remove portions of the conductive layer not covered by the spacers or the material, where remaining portions of the conductive layer form the conductive structures.Type: GrantFiled: March 9, 2011Date of Patent: December 2, 2014Assignees: Advanced Micro Devices, Inc., Spansion LLCInventors: Michael Brennan, Scott Bell