Abstract: The present invention provides a semiconductor device that can achieve both low on-resistance and high withstand voltage, while reducing the device size, improving the manufacturing yield, and reducing the cost. The semiconductor device 1 includes a substrate 5, an epitaxial layer 6 formed on the substrate 5 and formed with a gate trench 11, a gate insulating film 17 formed on the side surface 14 and the bottom surface 15 of the gate trench 11, a gate electrode 20 embedded in the gate trench 11 and opposed to the epitaxial layer 6 with the gate insulating film 17 therebetween, and a source layer 25, a channel layer 26, and a drift layer 27 formed in this order from a first surface to a second surface of the epitaxial layer 6, in which the on-resistance Ron represented by a variable “y” and the withstand voltage Vb represented by a variable “x” functionally satisfy the following relational expression (1): y?9×10?7x2?0.0004x+0.7001??(1).

Abstract: A display apparatus includes a substrate having a display area and a peripheral area outside the display area, a dam in the peripheral area, a first inorganic layer located in both the display area and the peripheral area and covering the dam, an upper surface of the first inorganic layer being nonplanar, and a roughness of the upper surface at a first part of the first inorganic layer outside the dam being greater than a roughness of the upper surface near a center of the display area, an organic layer covering the first inorganic layer in the display area and a portion of the peripheral area, and a second inorganic layer located in both the display area and the peripheral area and covering the dam and the organic layer.

Abstract: A memory cell comprises a first word line in a first layer on a first level. The memory cell also comprises a second word line having a first portion in the first layer and a second portion in a second layer. The second layer is on a second level different from the first level. The memory cell further comprises a first via layer coupling the first portion of the second word line with the second portion of the second word line.

Abstract: The present invention relates to a light emitting diode and a method of manufacturing same. The light emitting diode includes: a first conductive semiconductor layer; a plurality of mesas that are disposed spaced apart from one another on the first conductive semiconductor layer, each mesa including an active layer and a second conductive semiconductor layer; reflective electrodes that are respectively disposed on the plurality of mesas and come into ohmic contact with the second conductive semiconductor layer; openings that cover the plurality of mesas and the first conductive semiconductor layer, are electrically insulated from the mesas, and expose the reflective electrodes to the upper region of each mesa; and a current spreading layer that comes into ohmic contact with the first conductive semiconductor layer. Thus, a light emitting diode that improves current spreading performance may be provided.

Abstract: A liquid crystal display includes a first gate line, a first data line, and a first pixel. The first pixel includes: a first subpixel including a first thin film transistor connected to the first gate line and data line, and a first liquid crystal capacitor, wherein a first terminal of the first liquid crystal capacitor is electrically connected to the first thin film transistor and a second terminal of the first liquid crystal capacitor is configured to receive a common voltage; and a second subpixel including a second thin film transistor connected to the first gate line and data line, a second liquid crystal capacitor, wherein a first terminal of the second liquid crystal capacitor is configured to receive the common voltage, and a thin film transistor resistor electrically connected between the second thin film transistor and a second terminal of the second liquid crystal capacitor.

Abstract: Light emitter packages, systems, and methods having multiple light emitter chips and operable at multiple voltages are provided. In some aspects, light emitter packages described herein include a submount having a plurality of contact pads and a plurality of light emitting diode (LED) chips disposed over one or more surfaces thereof. The plurality of contact pads are configured to pass electrical current into the plurality of LED chips for allowing the package to be operable in at least two different voltages. The package can be operable at approximately 3 volts (V) or more, approximately 6V or more, approximately 9 V or more, approximately 12V or more, approximately 18 V or more, or approximately 36 V or more.

Abstract: A substrate of a transparent flexible display and an organic light-emitting diode display including the same are disclosed. In one aspect, the substrate includes a first polymer film having a predetermined color and a second polymer film having an inverse opal structure formed on a surface of the first polymer film.

Abstract: An array substrate and a fabrication method thereof are provided. The array substrate comprises a plurality of wiring regions (S-S?) disposed in a non-display region, a plurality of signal lines (111, 112) is provided in the wiring regions (S-S?), at least part of the signal lines (111, 112) within each of the wiring regions (S-S?) are respectively formed by connecting conducting wires (121, 123) located in different layers in series; and any two of the signal lines (111, 112) within a same wiring region (S-S?) have a resistance difference within a threshold range. The same signal line (111, 112) is disposed in different layers, so that the signal line (111, 112) is bent in a plane perpendicular to the array substrate, which achieves of the extension of a length of the signal line (111, 112), and thus increases the length and resistance of the signal line (111, 112), the resistance of which needs to be increased.

Abstract: A flexible display device of which esthetic appearance is improved by reducing a bezel is disclosed. The flexible display device comprises a substrate including a display area and a non-display area including a bending area; a link line in the non-display area on the substrate; and a bending connection line in the bending area pf the substrate and connected with the link line, and the bending connection line located between a first buffer layer and a second buffer layer of the flexible display device.

Abstract: The present invention provides a manufacture method of a polysilicon thin film and a polysilicon TFT structure. The manufacture method of the polysilicon thin film comprises: step 1, providing a substrate (1), and forming the polysilicon thin film (3) on the substrate (1), and a thickness of the polysilicon thin film (3) accords with a required thickness of manufacturing a semiconductor element; step 2, implementing silicon self-ion implantation to the polysilicon thin film (3), and an implantation volume of silicon ion is lower than a measurement limit for making polysilicon be decrystallized. The manufacture method of the polysilicon thin film makes the implanted silicon ion to form interstitial silicon to move to the polysilicon grain boundary, which can reduce the defect concentration of the polysilicon grain boundary and improve the quality of the polysilicon thin film.

Abstract: An image sensor includes a substrate having a pixel region and a periphery region. The image sensor further includes a first isolation structure formed in the pixel region; the first isolation structure including a first trench having a first depth. The image sensor further includes a second isolation structure formed in the periphery region; the second isolation structure including a second trench having a second depth. The second depth is greater than the first depth.

Abstract: In some forms, an electronic assembly includes a substrate; and a ball pad mounted on the substrate, wherein the ball pad includes a plurality of lobes projecting distally from a center of the ball pad. In some forms, he electronic assembly includes a substrate; and a ball pad mounted on the substrate, wherein the ball pad includes a lobe projecting distally from a center of the ball pad. In some forms, the electronic assembly includes a substrate; and a ball pad mounted on the substrate, wherein the ball pad includes at least one lobe projecting distally from a center of the ball pad; and an electronic package that includes at least one conductor that electrically connects the ball pad on the substrate to the electronic package.

Abstract: An electrostatic discharge (ESD) protection circuit (FIG. 2A) for an integrated circuit is disclosed. The circuit is formed on a substrate (P-EPI) having a first conductivity type. A buried layer (NBL 240) having a second conductivity type is formed below a face of the substrate. A first terminal (206) and a second terminal (204) are formed at a face of the substrate. A first ESD protection device (232) has a first current path between the first terminal and the buried layer. A second ESD protection device (216) has a second current path in series with the first current path and between the second terminal and the buried layer.

Abstract: The present disclosure relates to a thin film transistor substrate having two different types of thin film transistors on the same substrate and a display using the same. A disclosed display device may include a substrate, a first thin film transistor including a first semiconductor layer having a polycrystalline semiconductor material on the substrate, and a second thin film transistor including a second semiconductor layer including an oxide semiconductor material on the substrate. Both the first semiconductor layer and the second semiconductor layer may be disposed directly on a same underlying layer.

Abstract: A film stack and manufacturing method thereof are provided. The film stack includes a plurality of first metal-containing films, and a plurality of second metal-containing films. The first metal-containing films and the second metal-containing films are alternately stacked to each other. The first metal-containing films and the second metal-containing films comprise the same metal element and the same nonmetal element, and a concentration of the metal element in the second metal-containing film is greater than a concentration of the nonmetal element in the second metal-containing film.

Abstract: An energy harvesting device includes prefabricated thin film energy absorption sheets that are each tuned to absorb electromagnetic energy of a corresponding wavelength. The energy harvesting device can include a prefabricated thin film converter sheet to convert the electromagnetic energy into electrical power. The energy harvesting device can include a prefabricated thin film battery sheet to store the electrical power. Each thin film energy absorption sheet can be fabricated using a roll-to-roll process. The energy harvesting device can be fabricated using a roll-to-sheet process from rolls of the thin film energy absorption sheets.

Abstract: A disposable gate structure is formed over the alternating stack of first semiconductor material portions and second semiconductor material portions. The second semiconductor material portions are removed selective to the first semiconductor material portions to form suspended semiconductor nanowires. Isolated gate structures are formed in regions underlying the disposable gate structure by deposition and recessing of a first gate dielectric layer and a first gate conductor layer. After formation of a gate spacer, source regions, and drain regions, raised source and drain regions are formed on the source regions and the drain regions by selective deposition of a semiconductor material. The disposable gate structure is replaced with a replacement gate structure by deposition and patterning of a second gate dielectric layer and a second gate conductor layer. Distortion of the suspended semiconductor nanowires is prevented by the disposable gate structure and the isolated gate structures.

Abstract: A system and method for forming a sensor device with a buried first electrode includes providing a first silicon portion with an electrode layer and a second silicon portion with a device layer. The first silicon portion and the second silicon portion are adjoined along a common oxide layer formed on the electrode layer of the first silicon portion and the device layer of the second silicon portion. The resulting multi-silicon stack includes a buried lower electrode that is further defined by a buried oxide layer, a highly-doped ion implanted region, or a combination thereof. The multi-silicon stack has a plurality of silicon layers and silicon dioxide layers with electrically isolated regions in each layer allowing for both the lower electrode and an upper electrode. The multi-silicon stack further includes a spacer that enables the lower electrode to be accessible from a topside of the sensor device.

Abstract: A semiconductor device includes first channel layers disposed over a substrate, a first source/drain region disposed over the substrate, a gate dielectric layer disposed on and wrapping each of the first channel layers, a gate electrode layer disposed on the gate dielectric layer and wrapping each of the first channel layers, and a liner semiconductor layer disposed between the first channel layers and the first source/drain region.

Abstract: An electrical component having a first package part of a first plastic compound. The first package part has a first trench-shaped formation. A first semiconductor body with an integrated circuit is disposed in the first trench-shaped formation. At least two traces, which run on an outer side of the first package part, are provided on a surface of the first trench-shaped formation, wherein the at least two traces are connected to the integrated circuit. The first trench-shaped formation is filled at least partially with a filling material of a second plastic compound to cover the first semiconductor body.