Patents Examined by Suian Tang
  • Patent number: 8180070
    Abstract: A howling suppressing apparatus includes: a detecting unit configured to detect howling of input audio signals; a plurality of filters configured to apply a filter process sequentially to the audio signals to be output; and a setting unit configured to set a filter coefficient for suppressing the howling detected by the detecting unit for a filter among the plurality of filters, in which filter no filter coefficient for suppressing howling is set, and set a filter coefficient for suppressing the howling detected by the detecting unit for any one of the plurality of filters, if filter coefficients for suppressing howling are set in all of the plurality of filters, based on the detection result from the detecting unit.
    Type: Grant
    Filed: August 20, 2008
    Date of Patent: May 15, 2012
    Assignees: Semiconductor Components Industries, LLC, Sanyo Semiconductor Co., Ltd.
    Inventor: Hirotaka Tatsumi
  • Patent number: 8174018
    Abstract: A display device including a first gate line and a second gate line that extend in parallel with each other, a data line crossing the first and second gate lines to form a pixel region, a pixel electrode in the pixel region and including a main pixel electrode and a sub pixel electrode, which are connected to the first gate line and the data line, a control thin film transistor connected to the second gate line and the sub pixel electrode, and a gate driver. The gate driver outputs a first gate signal to the first gate line and a second gate signal to the second gate line. The first gate signal activates the first gate line during a first time and a second time following the first time, and the second gate signal activates the second gate line during the first time but not the second time.
    Type: Grant
    Filed: February 6, 2008
    Date of Patent: May 8, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yoon-Sung Um, Jae-Jin Lyu, Seung-Beom Park, Dong-Gi Seong, Kang-Woo Kim
  • Patent number: 8160272
    Abstract: An audio output circuit includes a port attenuation circuit, which is configured to convert an abrupt dc voltage offset transition between a pair of audio signals received in sequence at an input thereof into a more gradual transition. This conversion is achieved by performing, in sequence, a ramp-to-mute operation on a first of the pair of audio signals and a ramp-from-mute operation on a second of the pair of audio signals. The ramp-to-mute operation includes ramping an output of the audio output circuit from a dc voltage offset associated with the first of the pair of audio signals to a reference dc voltage offset. The ramp-from-mute operation includes ramping the output of the audio output circuit from the reference dc voltage offset to a dc voltage offset associated with the second of the pair of audio signals. These ramping operations may be performed using voltage steps having uniform step size.
    Type: Grant
    Filed: July 15, 2008
    Date of Patent: April 17, 2012
    Assignee: Integrated Device Technology, Inc.
    Inventors: Jeffrey Blackburn, Ajaykumar Kanji
  • Patent number: 8154080
    Abstract: An electronic device including in any sequence: (a) a semiconductor layer; and (b) a dielectric structure comprising a lower-k dielectric polymer and a higher-k dielectric polymer, wherein the lower-k dielectric polymer is in a lower concentration than the higher-k dielectric polymer in a region of the dielectric structure closest to the semiconductor layer.
    Type: Grant
    Filed: December 5, 2008
    Date of Patent: April 10, 2012
    Assignee: Xerox Corporation
    Inventors: Yiliang Wu, Paul F Smith
  • Patent number: 8154104
    Abstract: In a semiconductor device and a method of making the same, the semiconductor device comprises a substrate including a first region and a second region. At least one first gate structure is on the substrate in the first region, the at least one first gate structure including a first gate insulating layer and a first gate electrode layer on the first gate insulating layer. At least one isolating structure is in the substrate in the second region, a top surface of the isolating structure being lower in height than a top surface of the substrate. At least one resistor pattern is on the at least one isolating structure.
    Type: Grant
    Filed: March 19, 2008
    Date of Patent: April 10, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jinhyun Shin, Minchul Kim, Seong Soon Cho, Seungwook Choi
  • Patent number: 8143648
    Abstract: A photodetector containing a 2DEG layer is disclosed.
    Type: Grant
    Filed: August 9, 2007
    Date of Patent: March 27, 2012
    Assignee: HRL Laboratories, LLC
    Inventor: Jeong-Sun Moon
  • Patent number: 8138545
    Abstract: A semiconductor device includes: a substrate on and/or over which a first conductive type well is formed; and an LDMOS device that includes a gate electrode and has a drain region formed in the substrate. The LDMOS device includes a trench formed on the substrate, a second conductive type body that is formed on one side of the trench and on the substrate therebeneath, and a first conductive type source region that is formed in the second conductive type body.
    Type: Grant
    Filed: December 11, 2009
    Date of Patent: March 20, 2012
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Hyon-Chol Lim
  • Patent number: 8138602
    Abstract: Structure and methods of making the structures. The structures include a structure, comprising: an organic dielectric passivation layer extending over a substrate; an electrically conductive current spreading pad on a top surface of the organic dielectric passivation layer; an electrically conductive solder bump pad comprising one or more layers on a top surface of the current spreading pad; and an electrically conductive solder bump containing tin, the solder bump on a top surface of the solder bump pad, the current spreading pad comprising one or more layers, at least one of the one or more layers consisting of a material that will not form an intermetallic with tin or at least one of the one or more layers is a material that is a diffusion barrier to tin and adjacent to the solder bump pad.
    Type: Grant
    Filed: September 20, 2010
    Date of Patent: March 20, 2012
    Assignee: International Business Machines Corporation
    Inventors: Timothy Harrison Daubenspeck, Timothy D. Sullivan
  • Patent number: 8139785
    Abstract: A method and apparatus for sound reinforcement for musical instruments. The method and apparatus re-direct sound waves via an open-sided chamber against a curved wall panel in such a way that the sound from a musical amplifier is reflected or altered in its course from a direction in which the microphone design has reduced sensitivity to a direction of maximum sensitivity and, typically, altering the direction of the sound from off-axis to on-axis into the microphone capsule.
    Type: Grant
    Filed: June 23, 2008
    Date of Patent: March 20, 2012
    Inventor: Charles C. Ferrill
  • Patent number: 8139833
    Abstract: A method and/or system for making determinations regarding samples from biologic sources. A computer implemented method and/or system can be used to automate parts of the analysis.
    Type: Grant
    Filed: April 9, 2009
    Date of Patent: March 20, 2012
    Inventor: Boris Fain
  • Patent number: 8110473
    Abstract: A semiconductor device including a multilayer dielectric film and a method for fabricating the semiconductor device are disclosed. The multilayer dielectric film includes a type-one dielectric film having a tetragonal crystalline structure, wherein the type-one dielectric film comprises a first substance. The multilayer dielectric film also comprises a type-two dielectric film also having a tetragonal crystalline structure, wherein the type-two dielectric film comprises a second substance different from the first substance and a dielectric constant of the type-two dielectric film is greater than a dielectric constant of the type-one dielectric film.
    Type: Grant
    Filed: December 10, 2009
    Date of Patent: February 7, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-yeol Kang, Jong-cheol Lee, Ki-vin Lim, Hoon-sang Choi, Eun-ae Chung
  • Patent number: 8106487
    Abstract: A semiconductor device includes an inorganic coating layer to at least partially cover a junction termination extension.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: January 31, 2012
    Assignee: Pratt & Whitney Rocketdyne, Inc.
    Inventors: Erich H. Soendker, Thomas A. Hertel, Horacio Saldivar