Abstract: A fuzzy controller for Anti-Skid Brake System which utilizes fuzzy rules to avoid skidding and spinning of a vehicle during braking.

Abstract: An infra-red sensor system for all weather, day and night traffic surveillance of ground based vehicles. The infra-red sensor system comprises system comprises an infra-red, focal plane array detector, signal processors, a communications interface and a central computer. The infra-red, focal plane array detector senses the heat emitted from vehicles passing within the field of view. Information collected from the array detector is input to signal processors which are programmed with tracking algorithms and other application specific algorithms to extract and calculate meaningful traffic data from the infra-red image captured by the array detector. The meaningful data includes the location, speed and acceleration of all vehicles passing within the field of view of the array detector. The information from the signal processors is transmitted to the central computer via the communications interface for further processing and dissemination of information.

Abstract: An apparatus for calculating an estimated vehicle speed. The estimated vehicle speed is based upon the wheel speed of a wheel associated with a brake of the vehicle that has been applied, in order to obtain an estimated vehicle speed that closely approximates the true vehicle speed. The present invention is especially applicable to vehicles having an antilock control system, in that the antilock brake control can be more accurately controlled to be operated when the wheel speed of the vehicle exceeds a predetermined amount less than the true vehicle speed.

Abstract: An apparatus for recording driving data which comprises a data gathering device, which further comprises a sensory measuring device, a control unit, an A/D converter, a plurality of parallel ring storage devices and a semiconductor storage device. Analog measurement signals, which are continuously detected by the sensory measuring device, for recording a vehicle movement, are continuously sensed by the control unit with two different frequencies after being digitized into digital measurement signals in the A/D converter. The digital signals are stored in the plurality of parallel ring storage devices with clock frequencies.

Abstract: A clock-signal distributing method used in a wiring-pattern network such that a clock signal is supplied from root driver cells via repeating buffer cells to terminal cells.

Abstract: A method of determining vehicle rotation rates while suppressing interferences caused by sensor principles. In particular, the time-dependent drift of prior art gyro systems is to be avoided in the navigation of driverless transportation systems, and faulty reactions of wheel sensors with respect to the direction information of the vehicle, for example when passing through potholes, are to be avoided. This is accomplished by a method according to which a rotation rate signal (18) generated in a gyro arrangement (12) passes through a highpass filter (20) and a rotation rate signal (22) generated by wheel sensors passes through a lowpass filter (24), and the two then occurring individual signals (18', 22') are combined for a determination of the actual vehicle rotation rate.

Abstract: A counting section includes: a first gyro pulse counter which counts gyro pulses from each of X-, Y-, Z- and S-axis gyroscopes during each counting period after being reset immediately before the start of the counting period and outputs the count value as a first gyro pulse count value at fixed time intervals; and a second gyro pulse counter which is reset at said fixed time intervals, counts the gyro pulses and outputs the count value as a second gyro pulse count value.

Abstract: In a read only memory protected against erasure in processor-controlled apparatus, the loading occurs via a wireless data transmission interface. The processor-controlled apparatus is a mobile apparatus in which a loader provided for loading the read only memory is installed. This loader controls the communication of the data transmission interface as well as the erasing and reprogramming of the read only memory. The processor control program or program parts thereof to be reloaded are requested by the processor-controlled apparatus in blocks from a reloading station which likewise has a wireless data transmission interface and are written into the read only memory. The individual program blocks are protected by check sums in the block-by-block transmission. After the end of the programming, the processor control program that has been reloaded is checked by length comparison and check sum comparison to ensure that the data transmission was error-free.

Abstract: A traction control method for a vehicle, comprising the steps of: judging an excessive slipping state of a plurality of driving wheels by taking into account, as at least one judgment requirement, whether or not a driving-wheel speed exceeds a braking-force controlling target wheel speed determined by taking into account a predetermined slip rate of a vehicle speed, and controlling a braking force for the driving wheels in accordance with the result of the judgment, wherein the intensity of a slipping tendency for every one of the driving wheels is determined on the basis of a judgment value which is set larger than the vehicle speed and smaller than the braking-force controlling target wheel speed, and the smaller the number of the driving wheels determined to have a large slipping tendency, the more the braking-force controlling target wheel speed is increased. This prevents the occurrence of an excessive control of braking force, when the slipping tendency of only a part of the driving wheels is large.

Abstract: This invention comprises a system for calculating at least one vehicular traffic check parameter. The system according to the invention includes a pulse modulated radar placed at a high point at the side of the lanes to be monitored. The radar emits pulses having a frequency f.sub.o and width .tau. according to a radiation diagram. The radiation diagram is narrow in plan and sufficiently wide in elevation to cover all lanes to be monitored, and inclined in elevation and plan such that at least one range bin of the radar is included in a lane. Echo signals received by the radar are then processed by a signal processing module and a parameter extraction module. The invention is particularly useful in automobile traffic, for calculation of the number of vehicles travelling in lanes, the vehicles speed and length, etc. The advantage of the this inventive system compared with previous systems is that it enables simultaneous checking of several traffic lanes.

Abstract: The present invention is a method for specifying test flow and binning of an integrated circuit part in an integrated circuit tester. The method comprises the steps of receiving descriptions of the tests, receiving test flow statements indicating when the tests are to be executed, receiving binning statements, executing the tests as indicated by the test flow statements, and binning the IC device as indicated by the results of the tests.

Abstract: In a control unit for automatic transmissions of motor vehicles, shifting points of a transmission are determined from performance graphs. Through the use of an evaluation circuit, a driving style of a driver is recorded and taken into account in determining the shifting points of the transmission. An operating mode can be initiated by the driver, and during the operating mode, shifting points that are manually selected by the driver are stored permanently in memory for calling up the shifting points as desired.

Abstract: A module cell generating device of a semiconductor integrated circuit includes a parameter input part for applying a designation parameter, a basic cell group storing the basic cells, and a basic cell arranging and wiring process part for generating layout designing data by utilizing a structure description part which is a control description for defining the arrangement method and the wiring method of the basic cells, the designation parameter, the structure description, and the basic cells. Furthermore, it includes a basic cell generating process part for generating the newly designated basic cells in accordance with the designation parameter.

Abstract: A navigation system having two sensors and two circuits. A travel sensor sends a pulse whenever a vehicle travels a predetermined distance. An angular velocity sensor outputs a voltage corresponding to an angular velocity of the vehicle. A correction circuit calculates the angular velocity from both a reference voltage that corresponds to an angular velocity of zero and an output voltage from the angular velocity sensor. A reference voltage resetting circuit monitors the pulse from the travel sensor; sets, as an effective sampling interval, at least a part of a interval from the end of a predetermined first cancellation interval after the pulse stops until the start of a second cancellation interval prior to a resumption of the pulse; calculates an average value of the output voltage of the angular velocity sensor, which has been periodically sampled during the effective sampling interval; and resets the reference voltage to the average value.

Abstract: A design verification device includes a diagram data memory for storing designed diagram data, a design reference value memory for storing a design reference value, a determination circuit for making determination with different weight between intersecting directions of a diagram to either the distance or the design reference value in calculating the distance between diagram data provided from the diagram data memory means for making determination whether the calculated distance follows the design reference value; and an error signal output circuit for providing an error signal when determination is made that the design reference value is not followed by the determination circuit.

Abstract: A hierarchical pitchmatching compactor is provided that maintains hierarchical structure, design rule correctness, and circuit integrity of a symbolic layout while globally compacting the layout without excessive computational or data handling requirements, even for layouts of substantial size. The compactor achieves this result by taking advantage of the regularity of the layout, to reduce the number of constraints in the linear programming problem to a minimum level. This minimal problem, called the minimum design, can be drastically smaller than the original minimization problem for layouts of practical interest. This technique is implemented by means of a computer program that operates on the original symbolic layout of an integrated circuit to produce an automatically compacted layout as the data output.

Abstract: A circuit layout pattern inspection method and a logical simulator for implementing the same. Wiring is substituted by a .pi. or T equivalent circuit and is described by a nodal equation, and a gate is described by a simplified model, that is, a current source calculation formula. By the nodal equation and the current source calculation formula, a simulation is performed to obtain a delay time for every node. The obtained delay time is stored to make the inspection easy.

Abstract: An inertial measurement and navigation system using a multisensor which provides analog acceleration and rate information to an analog to digital converter whose digital output is processed by a digital demodulator and fed to an AHRS systems processor whose output is fed to a digital to analog converter. Output information from the digital to analog converter can be stored or used to provide information to the pilot oil cockpit displays. The digital demodulator includes a phase locked loop comprising a Hilbert transform phase detector, a first order IIR loop filter and a digital controlled oscillator which provides in-phase and quadrature reference signals used in demodulation.

Abstract: A method and apparatus for simulating a microelectronic circuit or system includes the storing of a microelectronic circuit or system representation in a computer and then transforming the representation into an equivalent DC circuit containing resistive, capacitive and inductive elements. Then, a directed graph of the DC equivalent circuit is generated and a spanning tree is constructed therefrom. The spanning tree is then actually or virtually traversed to obtain multiple generations of circuit moments. The moments are then used to calculate the poles and residues for a given node and generate an approximate model of the circuit's transient response at that node. Moment shifting is used to provide for a stable approximate model. The actual residues corresponding to the coefficients of the time domain representation for the model can be calculated using the first q-1 moments. This constitutes a partial-Pade approximation.

Abstract: A method sizes routing channels used to route pads to a logic core. Six channels are defined. The six channels include a first special channel, a second special channel, a left channel, a right channel, a bottom channel and a top channel. The first special channel is immediately below the logic core and within a span of the logic core. The second special channel is immediately above the logic core and within a span of the logic core. The left channel is adjacent to a left side of the logic core, the first special channel and the second special channel. The right channel is adjacent to a right side of the logic core, the first special channel and the second special channel. The bottom channel is adjacent to a bottom side of the left channel, the first special channel and the right channel. The top channel is adjacent to a top side of the left channel, the first special channel and the right channel.