Patents Examined by Sy Danh Luu
  • Patent number: 5886712
    Abstract: A method for operating a microprocessor in extracting an arbitrary channel of data from an image of any number of multiple channels with substantially minimized processing cycles per byte. Each channel of an image is preferably sampled with a predetermined data length. Subsequently the microprocessor partitions each of said sampled data according to a partitioning criterion into a plurality of partitioned components and combines a plurality of said partitioned components to form a data variable that is formed only with data components indicative of a selected channel of the image.
    Type: Grant
    Filed: May 23, 1997
    Date of Patent: March 23, 1999
    Assignee: Sun Microsystems, Inc.
    Inventor: Xuejian Cheng
  • Patent number: 5872576
    Abstract: In order to provide a mask data generator operating at a sufficient speed with a small circuit scale for generating mask data to mask a sequence of drawing data composed of a plurality of data blocks, the mask data generator of the invention has a first and a second mask data generation circuits (200, 201), each comprising; bit pattern extracting means (211) for obtaining a first bit pattern indicating a boundary block wherein pixel data designated by address data are included and a second bit pattern indicating a position of the pixel data in the boundary block; a boundary byte discrimination circuit (216) for discriminating the boundary block making use of the first bit pattern; and an array of multiplexers (217) each corresponding to each of the plurality of data blocks, one multiplexer, which corresponds to the boundary block, selecting the second bit pattern controlled by the boundary byte discrimination circuit, and each of the other multiplexers selecting either a bit pattern of all `0` or a bit patter
    Type: Grant
    Filed: June 25, 1997
    Date of Patent: February 16, 1999
    Assignee: NEC Corporation
    Inventor: Koji Ishikawa
  • Patent number: 5859650
    Abstract: A graphic controlling processor includes a frame memory for storing graphic data for displaying a graphic image, wherein the frame memory is divided into territories. A graphic controller controls to display the graphic image based on the graphic data and to clear the frame memory. A control flag may be added to the graphic data for differentiating a frame number, and the graphic data may then be cleared from one of each of the territories in one frame cycle based on the control flag. This graphic controlling processor provides enough time for displaying the graphic image with high graphic quality.
    Type: Grant
    Filed: February 19, 1997
    Date of Patent: January 12, 1999
    Assignee: Ricoh Company, Ltd.
    Inventor: Naoto Shiraishi