Patents Examined by T. Dickey
  • Patent number: 6410945
    Abstract: A heterojunction bipolar transistor having a ballast resistance layer between an AlGaAs emitter layer and an emitter electrode, wherein the ballast resistance layer comprises n-AlxGa1−XAs, wherein 0<X<1, and a GaAs selective etching layer is provided between the emitter layer and the ballast resistance layer.
    Type: Grant
    Filed: June 23, 2000
    Date of Patent: June 25, 2002
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masahiro Shiota, Toshiyuki Shinozaki, Hideyuki Tsuji, Toshiaki Kinosada