Abstract: The present invention provides a display device, including a display unit having a plurality of semiconductor light emitting devices and outputting light to an upper surface thereof, a transparent substrate located on an upper side of the display unit and having a fixing portion protruding from one surface thereof to surround a side surface of the display unit, an elastic portion located to cover a lower surface of the display unit and made of an elastic member, a first back cover coupled to a part of the transparent substrate not overlapping the display unit in an injection manner, and a second back cover located to overlap the display unit and fixed to the first back cover, wherein the elastic portion presses the display unit toward the transparent substrate.

Abstract: A non-volatile memory cell includes a selection transistor having an insulated selection gate embedded in a semiconducting substrate region. A semiconducting source region contacts a lower part of the insulated selection gate. A state transistor includes a floating gate having an insulated part embedded in the substrate region above an upper part of the insulated selection gate, a semiconducting drain region, and a control gate insulated from the floating gate and located partially above the floating gate. The source region, the drain region, the substrate region, and the control gate are individually polarizable.

Abstract: The present disclosure relates to a compressor control apparatus and a compressor control method thereof, and more particularly, to a compressor control apparatus for controlling a switching operation of a switching device to control the start-up of a compressor motor and a compressor control method thereof.

Abstract: A display device includes: a display panel including panel terminals; and a wiring substrate including first substrate terminals coupled to the panel terminals. The panel terminals include panel terminals arranged in a first region and panel terminals arranged in second regions sandwiching the first region. The first substrate terminals include first substrate terminals arranged in a third region and first substrate terminals arranged in fourth regions sandwiching the third region. A gap between panel terminals is substantially constant in the first and second regions. A first width of the panel terminals in the first region is different from a second width of the panel terminals in the second regions. A width of the first substrate terminals is substantially constant in the third and fourth regions. A first gap between first substrate terminals in the third region is different from a second gap between first substrate terminals in the fourth regions.

Abstract: An operating method of a nonvolatile memory device which includes a cell string including a plurality of cell transistors connected in series between a bit line and a common source line and stacked in a direction perpendicular to a substrate, the method including: programming an erase control transistor of the plurality of cell transistors; and after the erase control transistor is programmed, applying an erase voltage to the common source line or the bit line and applying an erase control voltage to an erase control line connected to the erase control transistor, wherein the erase control voltage is less than the erase voltage and greater than a ground voltage, and wherein the erase control transistor is between a ground selection transistor of the plurality of cell transistors and the common source line or between a string selection transistor of the plurality of cell transistors and the bit line.

Abstract: Fluid collection devices, analysis instruments and methods for making and using same are disclosed. The fluid collection device is provided with a device and an electrochemical cell. The device has first and second walls defining a microfluidic channel, and a sample application port communicating with the microfluidic channel. The first wall and the second wall are spaced a distance less than 150 microns. The electrochemical cell is disposed on the first wall to contact a sample travelling through the microfluidic channel. The electrochemical cell comprising molecule receptors such that a physical property of the first electrochemical cell is effected upon one or more of the molecule receptors binding to an electroactive species within the sample.

Abstract: Techniques are provided for optimizing an erase operation in a memory device to compensate for erase speed variations due to blocking oxide thinning In an erase operation for a block, the channels of NAND strings in different sub-blocks can be charged up by different amounts. One approach adjusts the control gate voltage of a first select gate transistor in a NAND string. This adjusts the amount of holes generated in the channel due to gate-induced drain leakage. Another approach adjusts the control gate voltage of additional select gate transistors in the NAND string to adjust the conductivity of the adjacent channel regions. Another approach applies different bit line voltages to different rows of NAND strings in each sub-block.

Abstract: A camera device with anti-ghosting and anti-flare properties includes a printed circuit board; an image sensor mounted on the printed circuit board; and a supporting bracket fixed on the printed circuit board. The supporting bracket includes a supporting plate and perpendicular side wall. The supporting plate and the side wall together form a receiving room covering the image sensor, the supporting plate is opened to form a step portion. The step portion comprises a matte top bearing surface, and a protecting sheet fixed on the matte top bearing surface.

Abstract: The provided is a method of controlling a dynamic random-access memory (DRAM) device comprising: storing a plurality of pieces of data consisting of a plurality of bits in a memory in a transposed manner; setting at least one refresh period for each of a plurality of rows constituting the memory; and performing a refresh operation of the memory on the basis of the set refresh period.

Abstract: An actuator that includes a bottom plate, a top-plate, and a first and second hub assembly extending between the bottom and top plates. The actuator can further include a first and second bellows disposed on opposing sides of the hub assemblies, the first and second bellows each extending between and coupled to the top plate and bottom plate. The actuator can also include a plurality of washers disposed between the top and bottom plates, with each of the washers coupled to the first and second hub assembly, a first set of the plurality of washers surrounding the first bellows and a second set of the plurality of washers surrounding the second bellows.

Abstract: Methods, systems, and devices for sensing techniques for a memory cell are described to enable a latch to sense a logic state of a memory cell. A transistor coupled with a memory cell may boost a first voltage associated with the memory cell to a second voltage via one or more parasitic capacitances of the transistor. The second voltage may be developed on a first node of a sense component, and the second voltage may be shifted to a third voltage at a first node of the sense component by applying a voltage to a shift node coupled with a capacitor of the sense component. Similar boosting and shifting operations may be performed to develop a reference voltage on a second node of the sense component. The sense component may sense the state of the memory cell by comparing with the reference voltage.

Abstract: Systems, apparatuses, and methods related to extended memory communication subsystems for performing extended memory operations are described. An example method can include receiving, at a processing unit that is coupled between a host device and a non-volatile memory device, signaling indicative of a plurality of operations to be performed on data written to or read from the non-volatile memory device. The method can further include performing, at the processing unit, at least one operation of the plurality of operations in response to the signaling. The method can further include accessing a portion of a memory array in the non-volatile memory device. The method can further include transmitting additional signaling indicative of a command to perform one or more additional operations of the plurality of operations on the data written to or read from the non-volatile memory device.

Abstract: An electric power conversion system includes: an inverter; a voltage converter including a high-voltage end connected to a direct-current power source and a low-voltage end connected to the inverter; and a controller. The controller is configured to control switching elements such that a voltage of the low-voltage end becomes lower than a voltage of the high-voltage end in a first state. The controller is configured to control the switching elements such that the voltage of the low-voltage end becomes equal to the voltage of the high-voltage end in a second state.

Abstract: An electrode for the use of an advanced lithium battery is fabricated using three-dimensionally structured metal foam coated with an active material. The metal foam is porous metal foam that can be used as an anode current collector of a lithium-ion battery and is coated with an anode active material, such as tin, through a sonication-assisted electroless plating method. Additionally, the coated metal foam is heat-treated at an appropriate temperature in order to improve the integrity of the coating layer and hence, the cyclic performance of the lithium-ion battery.

Abstract: The spin-orbit torque magnetization rotational element includes a spin-orbit torque wiring layer which extends in an X direction and a first ferromagnetic layer which is laminated on the spin-orbit torque wiring layer. The first ferromagnetic layer has shape anisotropy and has a major axis in the X direction. An easy axis of magnetization of the first ferromagnetic layer is inclined with respect to the X direction and a Y direction orthogonal to the X direction on a plane in which the spin-orbit torque wiring layer extends.

Abstract: A wiring board includes a first interconnect layer, a first insulating layer covering the first interconnect layer, a second interconnect layer, thinner than the first interconnect layer, formed on the first insulating layer and having an interconnect density higher than that of the first interconnect layer, and a second insulating layer formed on the first insulating layer and covering the second interconnect layer. The first insulating layer includes a first layer including no reinforcing material, and a second layer including a reinforcing material. The first and second layers include a non-photosensitive thermosetting resin as a main component thereof. The first layer has a coefficient of thermal expansion higher than that of the second layer, and the second insulating layer includes a photosensitive resin as a main component thereof. The second interconnect layer includes an interconnect formed directly on and electrically connected to the first interconnect layer.

Abstract: To provide a sense amplifier which is capable of implementing a large capacity, a high speed, and an increased data rate of a semiconductor storage device. A sense amplifier is provided, the sense amplifier including: first and second inverters including switches configured to control an activation state and an inactivation state, and having inputs and outputs cross-coupled to each other, respectively; and first and second switches configured to switch between connection and disconnection of each of the cross-coupled first and second inverters with respect to an input from a storage element.

Abstract: To provide an electronic apparatus, a camera apparatus, and a shield chassis to be installed in a vehicle and used, whose ground is reinforced. A flexible printed circuit includes an FPC extension portion which is a ground pattern portion extended from a terminal portion for electrically connecting to on the side of the board. On the other hand, a clip portion whose cross-section has an approximately C-shape and whose upper surface includes an opening formed therein is formed at an upper end edge of one wall surface of a shield chassis. A tongue portion of the FPC extension portion, which is inserted through the opening, is sandwiched by the clip portion, such that the FPC extension portion is fixed to the shield chassis.

Abstract: An improved computer server that generates less heat, requires less energy to operate, and is capable of operating in much higher temperatures includes a power conversion assembly that receives standard 110 volt or other voltage AC power and converts it to unregulated 48 volt DC current externally. Then the 48 volt current is fed into the internal power train, and converts that current to lower voltages for use by various components within the server. Additionally, the size and shape of the server housing allows for more efficient heat transfer, wherein the housing, in a preferred embodiment, has a lateral cross-section with dimensions of between 3.5 inches to 8 inches of width and 3.5 inches to 7 inches of height. The server also may include heat and humidity sensors within the server housing, and these sensors are operationally connected to the fan used for cooling the server.

Abstract: A method of encapsulating an electronic assembly comprises disposing a plurality of electrically non-conductive particles on a substrate which carries one or more components of the electronic assembly; introducing a reactive parylene monomer in a vapor form into interstitial spaces among the plurality of the electrically non-conductive particles; and forming a parylene binder in the interstitial spaces of the electrically non-conductive particles from the reactive parylene monomer.