Patents Examined by T. Vibol
  • Patent number: 6292028
    Abstract: An output circuit for a transmission system is disclosed. The output circuit of the present invention comprises an input terminal receiving an input logical signal, a first output terminal outputting a first output logical signal having a logic corresponding to a logic of the input logical signal, a second output terminal outputting a second output logical signal having a logic corresponding to an inverted logic of the input logical signal, a first constant voltage supply circuit generating a first voltage level, a second constant voltage supply circuit generating a second voltage level, and an output logic formation circuit connected to said first and second constant voltage supply circuits. The output logic formation circuit generates the first and second output logical signals having either the first voltage level or second voltage level based on the logic of the input logical signal.
    Type: Grant
    Filed: August 23, 1999
    Date of Patent: September 18, 2001
    Inventor: Takashi Tomita
  • Patent number: 6259269
    Abstract: A terminator circuit for connection to a network can be fabricated and used within CMOS-SOI (complementary metal oxide semiconductor—silicon on insulator) for carrying small logic level signals for connecting data from a network's first circuit to a network's second circuit in which a network's input terminal connects a terminator circuit to the network's second circuit to act as a terminator on the data line passing data from said first circuit to said second circuit. The terminator circuit has a reference circuit coupled to a terminal circuit. The reference circuit has SOI devices back to back source coupled CMOS-SOI devices to each other for a tuned center reference voltage node, with their bodies connect to upper and lower level power supplies respectively. An upper level power source is connected to one side of the reference voltage node and a lower reference voltage power source is connected to the other side of the reference voltage node.
    Type: Grant
    Filed: May 30, 2000
    Date of Patent: July 10, 2001
    Assignee: International Business Machines Corporation
    Inventor: David T. Hui