Patents Examined by Tahilba O Puche
  • Patent number: 11966583
    Abstract: The present disclosure provides a data pre-processing method and device and related computer device and storage medium. By storing the target output data corresponding to the target operation into the first memory close to the processor and reducing the time of reading the target output data, the occupation time of I/O read operations during the operation process can be reduced, and the speed and efficiency of the processor can be improved.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: April 23, 2024
    Assignee: CAMBRICON TECHNOLOGIES CORPORATION LIMITED
    Inventors: Shaoli Liu, Xiaofu Meng
  • Patent number: 11966584
    Abstract: Embodiments of the present disclosure relate to a method, an electronic device, and a computer program product for managing a storage device. The method includes: determining, based on the frequency of data access to the storage device, whether a data access component of the storage device will move; determining, if it is determined that the data access component will move, a first storage unit in the storage device based on a storage location of previously accessed data in the storage device, wherein the data access component is located at a first spatial location corresponding to the first storage unit; and sending a read request for data in a second storage unit in the storage device that is adjacent to the first storage unit, so as to cause the data access component to move from the first spatial location to a second spatial location corresponding to the second storage unit. The embodiments of the present disclosure can reduce the latency of data access to the storage device.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: April 23, 2024
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Bing Liu, Zheng Li
  • Patent number: 11960726
    Abstract: A media management system including an application layer, a system layer, and a solid state drive (SSD) storage layer. The application layer includes a media data analytics application configured to assign a classification code to a data file. The system layer is in communication with the application layer. The system layer includes a file system configured to issue a write command to a SSD controller. The write command includes the classification code of the data file. The SSD storage layer includes the SSD controller and erasable blocks. The SSD controller is configured to write the data file to one of the erasable blocks based on the classification code of the data file in the write command. In an embodiment, the SSD controller is configured to write the data file to one of the erasable blocks storing other data files also having the classification code.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: April 16, 2024
    Assignee: FUTUREWEI TECHNOLOGIES, INC.
    Inventors: Yiren Huang, Yong Wang, Kui (Kevin) Lin
  • Patent number: 11947837
    Abstract: According to one embodiment, a memory system receives, from a host, a write request including a first identifier associated with one write destination block and storage location information indicating a location in a write buffer on a memory of the host in which first data to be written is stored. When the first data is to be written to a nonvolatile memory, the memory system obtains the first data from the write buffer by transmitting a transfer request including the storage location information to the host, transfers the first data to the nonvolatile memory, and writes the first data to the one write destination block.
    Type: Grant
    Filed: August 4, 2020
    Date of Patent: April 2, 2024
    Assignee: Kioxia Corporation
    Inventors: Shinichi Kanno, Hideki Yoshida
  • Patent number: 11941287
    Abstract: A method, computer program product, and computer system for receiving, by a computing device, a Write-Same operation from a host for a range of logical block addresses of a destination. Data may be recorded in a buffer to indicate that the Write-Same operation is complete prior to completing the Write-Same operation. An acknowledgment may be sent to the host that the Write-Same operation is complete prior to flushing to a final destination. The Write-Same operation for the logical block addresses of the destination may be performed after sending the acknowledgment to the host that the Write-Same operation is complete.
    Type: Grant
    Filed: June 17, 2020
    Date of Patent: March 26, 2024
    Assignee: EMC IP Holding Company, LLC
    Inventors: Bar David, Ronen Gazit
  • Patent number: 11934672
    Abstract: A computer-implemented method and a computer system for improving cached workload management. A host, which is in a system comprising the host and a storage system, obtains information about classes of applications accessing the storage system. The host determines input/output queues dedicated to respective ones of the classes. The storage system creates, in the storage system, cache partitions dedicated to the respective ones of the classes, based on information about classes. The host creates the input/output queues and sets bit flags for respective ones of the input/output queues. The host pumps inputs/outputs coming from the respective ones of the classes to the respective ones of the input/output queues. The storage system directs the input/output queues to respective ones of the cache partitions.
    Type: Grant
    Filed: August 26, 2021
    Date of Patent: March 19, 2024
    Assignee: International Business Machines Corporation
    Inventors: Kushal S. Patel, Ankur Srivastava, Subhojit Roy, Sarvesh S. Patel
  • Patent number: 11899957
    Abstract: Data protection operations including replication operations are disclosed. Virtual machines, applications, and/or application data are replicated according to at least one strategy. The replication strategy can improve performance of the recovery operation.
    Type: Grant
    Filed: May 19, 2020
    Date of Patent: February 13, 2024
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Bing Liu, Jehuda Shemer, Kfir Wolfson, Jawad Said
  • Patent number: 11893240
    Abstract: Various embodiments include methods and devices for reducing latency in pseudo channel based memory systems. Embodiments may include a first pseudo channel selection device configured to selectively communicatively connect one of a plurality of pseudo channels to a first input/output (IO), and a second pseudo channel selection device configured to selectively communicatively connect one of the plurality of pseudo channels to a second IO, in which the first pseudo channel selection device and the second pseudo channel selection device may be operable to communicatively connect a first pseudo channel of the plurality of pseudo channels to the first IO and to the second IO concurrently. Embodiments may include the pseudo channel based memory system configured to receive a memory access command targeting the first pseudo channel, and use a first pseudo channel data bus and a second pseudo channel data bus to implement the memory access command.
    Type: Grant
    Filed: October 28, 2021
    Date of Patent: February 6, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Shyamkumar Thoziyoor, Pankaj Deshmukh, Jungwon Suh, Subbarao Palacharla
  • Patent number: 11868246
    Abstract: According to one embodiment, a memory system includes a nonvolatile memory, configuration unit, address translation unit, write unit and control unit. The configuration unit assigns write management areas included in the nonvolatile memory to spaces. The write management area is a unit of an area which manages the number of write. The address translation unit translates a logical address of write data into a physical address of a space corresponding to the write data. The write unit writes the write data to a position indicated by the physical address in the nonvolatile memory. The control unit controls the spaces individually with respect to the nonvolatile memory.
    Type: Grant
    Filed: April 19, 2022
    Date of Patent: January 9, 2024
    Assignee: Kioxia Corporation
    Inventor: Shinichi Kanno
  • Patent number: 11836362
    Abstract: Nodes in a storage system can autonomously ingest I/O requests and flush data to storage. First and second nodes determine a sequence separator, the sequence separator corresponding to an entry in a page descriptor ring that separates two flushing work sets (FWS). The first node receives an input/output (I/O) request and allocates a sequence identification (ID) number to the I/O request. The first node determines a FWS for the I/O request based on the sequence separator and the sequence ID number, and commits the I/O request using the sequence ID number. The I/O request and the sequence ID number are sent to the second node.
    Type: Grant
    Filed: January 26, 2022
    Date of Patent: December 5, 2023
    Assignee: Dell Products L.P.
    Inventors: Vladimir Shveidel, Geng Han, Yousheng Liu
  • Patent number: 11836067
    Abstract: A Hyper-Converged Infrastructure (HCl) system that includes a plurality of HCl log generating components and an HCl storage system that provides at least a portion of a log database. The HCl system receives a request from a management system to store a first log bundle of the plurality of HCl log generating components and determines the at least one second log bundle that is stored in the log database is at least a size threshold. The HCl system performs a log database clean operation on the at least one second log bundle and determines that the log database clean operation on the at least one second log bundle has provided an available storage capacity in the log database that is sufficient to store the first log bundle. The HCl system then stores the first log bundle in the log database.
    Type: Grant
    Filed: May 20, 2021
    Date of Patent: December 5, 2023
    Assignee: Dell Products L.P.
    Inventors: Edward Ding, Drake Yuan Qiu, Lewei Ji, Muzhar S. Khokhar
  • Patent number: 11809733
    Abstract: A method for storing data in a system that includes a plurality of storage devices, the method that includes obtaining object usage data from the plurality of storage devices, determining, using the object usage data, object clusters, where at least one object cluster of the object clusters includes at least two objects that are associated based on access patterns, migrate a first object, of the two objects, from a first storage device of the plurality of storage devices to a second storage device of the plurality of storage devices.
    Type: Grant
    Filed: December 9, 2022
    Date of Patent: November 7, 2023
    Assignee: DELL PRODUCTS L.P.
    Inventors: Kirill Aleksandrovich Bezugly, Nickolay Alexandrovich Dalmatov
  • Patent number: 11797218
    Abstract: A method for detecting a slow node includes: obtaining a generated record for a first storage node, the generated record including a storage node generation time, and a number of times and consuming time for transmitting data to second storage nodes other than the first storage node; obtaining a valid record from the generated record, the valid record being generated within a preset time period, and the preset time period being within a time period between the storage node generation time and a current time; determining an average consuming time for the first storage node transmitting the data to each of the second storage nodes, based on the number of times and the consuming time in the valid record; and detecting the slow node in the second storage nodes based on the average consuming time.
    Type: Grant
    Filed: April 23, 2020
    Date of Patent: October 24, 2023
    Assignee: Beijing Xiaomi Mobile Software Co., Ltd.
    Inventors: Haibin Huang, Lisheng Sun, Chen Zhang
  • Patent number: 11748027
    Abstract: A storage system suspends an ongoing program operation to execute a read command. There is a limit on the number of times the storage system can suspend the program operation, and latencies occur for read commands that are received after the limit has been reached. To improve read quality of service, a blackout window is established that prevents the storage system from suspending the program operation for a period of time after the program operation resumes. The period of time can be chosen such that program suspensions are evenly distributed over the course of the program operation.
    Type: Grant
    Filed: December 30, 2021
    Date of Patent: September 5, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Nagi Reddy Chodem, Evangelos Vazaios
  • Patent number: 11747984
    Abstract: A memory system connectable to a host includes a nonvolatile memory and a controller. The controller is configured to generate one or more virtual storage regions each of which is associated with a virtual machine running in the host, using physical memory regions of the nonvolatile memory, maintain a threshold value for each of said one or more virtual storage regions, determine a cumulative amount of data that have been written in each of said one or more virtual storage regions, and restrict writing of data with respect to a virtual storage region for which the cumulative amount exceeds the threshold value.
    Type: Grant
    Filed: March 16, 2021
    Date of Patent: September 5, 2023
    Assignee: Kioxia Corporation
    Inventor: Shinichi Kanno
  • Patent number: 11733870
    Abstract: Disclosed herein are systems having an integrated circuit device disposed within an integrated circuit package having a periphery, and within this periphery a transaction processor is configured to receive a combination of signals (e.g., using a standard memory interface), and intercept some of the signals to initiate a data transformation, and forward the other signals to one or more memory controllers within the periphery to execute standard memory access operations (e.g., with a set of DRAM devices). The DRAM devices may or may not be in within the package periphery. In some embodiments, the transaction processor can include a data plane and control plane to decode and route the combination of signals. In other embodiments, off-load engines and processor cores within the periphery can support execution and acceleration of the data transformations.
    Type: Grant
    Filed: January 16, 2019
    Date of Patent: August 22, 2023
    Assignee: Rambus Inc.
    Inventors: David Wang, Nirmal Saxena
  • Patent number: 11726706
    Abstract: A storage device includes a memory device including a plurality of sequential areas and a random area other than the plurality of sequential areas, the plurality of sequential areas storing pieces of data corresponding to consecutive logical addresses input from a host, a buffer memory device configured to temporarily store write data corresponding to a write request provided from the host and an operation controller configured to generate combined data by adding dummy data to the write data having a size less than a program unit size of the memory device, a size of the dummy data corresponding to a difference between the size of the write data and the program unit size, store the combined data in the memory device, and store combined data information, relating to the combined data stored in the memory device, in the buffer memory device.
    Type: Grant
    Filed: February 10, 2021
    Date of Patent: August 15, 2023
    Assignee: SK HYNIX INC.
    Inventors: Tae Jin Oh, Jung Ki Noh, Soon Yeal Yang
  • Patent number: 11726666
    Abstract: A network adapter includes a network interface controller and a processor. The network interface controller is to communicate over a peripheral bus with a host, and over a network with a remote storage device. The processor is to expose on the peripheral bus a peripheral-bus device that communicates with the host using a bus storage protocol, to receive first I/O transactions of the bus storage protocol from the host, via the exposed peripheral-bus device, and to complete the first I/O transactions in the remote storage device by (i) translating between the first I/O transactions and second I/O transactions of a network storage protocol, and (ii) executing the second I/O transactions in the remote storage device. For receiving and completing the first I/O transactions, the processor is to cause the network interface controller to transfer data directly between the remote storage device and a memory of the host using zero-copy.
    Type: Grant
    Filed: July 11, 2021
    Date of Patent: August 15, 2023
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Ben Ben-Ishay, Boris Pismenny, Yorai Itzhak Zack, Khalid Manaa, Liran Liss, Uria Basher, Or Gerlitz, Miriam Menes
  • Patent number: 11715030
    Abstract: Automatic object optimization to accelerate machine learning training is disclosed. A request for a machine learning training dataset comprising a plurality of objects is received from a requestor. The plurality of objects includes data for training a machine learning model. A uniqueness characteristic for objects of the plurality of objects is determined, the uniqueness characteristic being indicative of how unique each object is relative to each other object. A group of objects from the plurality of objects is sent to the requestor, the group of objects being selected based at least partially on the uniqueness characteristic or sent in an order based at least partially on the uniqueness characteristic.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: August 1, 2023
    Assignee: Red Hat, Inc.
    Inventors: Huamin Chen, Dennis R. C. Keefe
  • Patent number: 11704036
    Abstract: Systems and method for implementing deduplication process based on performance analyses. The system may include a processing device to determine a first performance metric associated with retrieving a second stored data block that is within a specified range of a duplicate of the first data block and a second performance metric associated with retrieving a hash value corresponding to the second stored data block. The processing device further to retrieve the second stored data block within a specified range of the duplicate of the first data block in response to the first performance metric not exceeding the second performance metric.
    Type: Grant
    Filed: November 16, 2018
    Date of Patent: July 18, 2023
    Assignee: PURE STORAGE, INC.
    Inventors: John Colgrove, Ronald Karr, Ethan L. Miller