Patents Examined by Terry D. Cunnigham
  • Low hold time statisized dynamic flip-flop
    Patent number: 6448829
    Abstract: A low hold time flip-flop that has a dynamic input stage and a static output stage is provided. The flip-flop uses a feedback stage to maintain a value on a dynamic node during an evaluation phase of the flip-flop so that an input to the flip-flop only has to be held for a relatively short period of time after the start of the evaluation phase.
    Type: Grant
    Filed: June 7, 2001
    Date of Patent: September 10, 2002
    Assignee: Sun Microsystems, Inc.
    Inventor: Ritesh Saraf
  • Apparatus and method for reference voltage generator with self-monitoring
    Patent number: 6400212
    Abstract: An apparatus and method for providing a reference voltage which provides a signal indicating when the reference voltage has reached a desired stable condition. This signal is obtained by comparing two test voltages which are interrelated and also related to the condition of the reference voltage.
    Type: Grant
    Filed: July 13, 1999
    Date of Patent: June 4, 2002
    Assignee: National Semiconductor Corporation
    Inventor: Satoshi Sakurai