Patents Examined by Tesfalde Bocure
  • Patent number: 5596605
    Abstract: In the case where a received multi-level orthogonal amplitude signal is not synchronized with a local carrier frequency signal, a digital multiplexing radio receiver recognizes that an adaptively-equalized data exist in a specified area on the phase plane of Ich and Qch orthogonal coordinates. The receiver controls an operation of amplifying Ich and Qch demodulated signals to a fixed level, based on the data of which exist in the specified area. Similarly, the receiver controls a phase of the local carrier frequency signal based on the data of existing in the specified area, and controls tap coefficients of an adaptive transversal filter which equalizes the received multi-level orthogonal amplitude signal. In the specified area, a distance between signal points of multi-level orthogonal amplitude signal is large so that influence caused by a phase rotation is small. Accordingly, the digital multiplexing radio receiver can rapidly and stably return to a synchronous mode.
    Type: Grant
    Filed: March 20, 1995
    Date of Patent: January 21, 1997
    Assignee: Fujitsu Limited
    Inventors: Hiroyuki Kiyanagi, Yuitsu Ogata, Toshio Tamura, Hisao Narita, Takahiko Terakado, Kenzo Kobayashi
  • Patent number: 5086437
    Abstract: In an automatic gain control device which is connected to an output circuit (21, 22) supplied with a gain controlled signal to produce a timing signal in a receiver of a direct conversion type and which includes an amplifier (23, 24) for amplifying a received baseband signal into an amplified signal with a controllable gain, a d.c. blocking circuit (25, 26) for producing a variable level signal with the amplified signal exempted from a d.c. component, and a level detector (27, 28) for producing a level value signal by detecting level values of the variable level signal, a timing controller (31) is supplied with the timing signal to produce a first control signal in each of predetermined time slots in which a receiver input signal comprises bursts representative of an information signal. A second control signal is produced in an interval between two consecutive ones of the predetermined time slots.
    Type: Grant
    Filed: June 13, 1990
    Date of Patent: February 4, 1992
    Assignee: NEC Corporation
    Inventor: Hideho Tomita
  • Patent number: 4964116
    Abstract: In a line interface circuit for binary data signals means are provided for compensating varying lengths of line in the receiving and/or transmission path. The output signal of a line equalizer controls a variable impedance circuit in such a way that attenuation of a line build out network is reduced if the output level of the line equalizer falls below a threshold. A transmit line build out network provides a frequency dependent attenuation of binary data by means of a control circuit, which supplies discrete attenuation values according to a logic word.
    Type: Grant
    Filed: November 2, 1988
    Date of Patent: October 16, 1990
    Assignee: ANT Nachrichtentechnik GmbH
    Inventor: Grahame Measor