Patents Examined by Thao Lee
  • Patent number: 6660608
    Abstract: A CMOS device (10) having p-channel and n-channel transistors with aluminum implanted gates (20). When making the device (10), aluminum is non-selectively implanted to form a source and drain for the n-channel transistor and to reduce the resistivity of the gates (20). The aluminum diffuses through an upper polysilicon layer (22) of the gate, thereby reducing its resistivity, but does not diffuse through a lower oxide layer (24) of the gate, thereby preventing penetration problems. Thereafter, a compensating implant (e.g., phosphorus or arsenic) is selectively implanted to overcompensate the boron previously implanted in the p-type tub.
    Type: Grant
    Filed: February 25, 2002
    Date of Patent: December 9, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Matthew Buynoski