Abstract: A semiconductor chip and a package substrate may be directly connected on the basis of form closure by providing appropriately shaped complementary contact structures in the semiconductor chip and the package substrate. Consequently, solder material may no longer be required and thus any elevated temperatures during the assembly process may be avoided, which may conventionally result in significant stress forces, thereby creating damage, in particular in very complex metallization systems.
Type:
Grant
Filed:
July 11, 2011
Date of Patent:
July 9, 2013
Assignee:
GLOBALFOUNDRIES Inc.
Inventors:
Michael Grillberger, Matthias Lehr, Thomas Werner
Abstract: Semiconductor devices and stacked die assemblies, and methods of fabrication are provided. In various embodiments, the die assembly comprises a first die mounted on a substrate and a second die mounted on the first die. In one embodiment, the second die has a recessed edge along the perimeter of the bottom surface to provide clearance for a bonding element extending from bond pads on the first die to pads on the substrate, thus eliminating the need for a spacer between the two dies. In another embodiment, the second die is at least partially disposed within a recess in the upper surface of the first die. In another embodiment, an adhesive element is disposed within a recess in the bottom surface of the first die for attaching the first die to the substrate. In yet another embodiment, the first die is at least partially disposed within a recess within the bottom surface of the second die. The stacked die assemblies can be encapsulated to form semiconductor packages.
Type:
Grant
Filed:
April 28, 2003
Date of Patent:
February 19, 2008
Assignee:
Micron Technology, Inc.
Inventors:
Hock Chuan Tan, Thiam Chye Lim, Victor Cher Khng Tan, Chee Peng Neo, Michael Kian Shing Tan, Beng Chye Chew, Cheng Poh Pour
Abstract: Floating gate structures are disclosed that have a projection that extends away from the surface of a substrate. This projection may provide the floating gate with increased surface area for coupling the floating gate and the control gate. In one embodiment, the word line extends downwards on each side of the floating gate to shield adjacent floating gates in the same string. In another embodiment, a process for fabricating floating gates with projections is disclosed. The projection may be formed so that it is self-aligned to the rest of the floating gate.
Type:
Grant
Filed:
June 20, 2003
Date of Patent:
September 12, 2006
Assignee:
SanDisk Corporation
Inventors:
Jeffrey Lutze, Tuan Pham, Henry Chien, George Matamis
Abstract: A method for reworking a ball grid array (BGA) of solder balls is provided including one or more defective solder balls on an electronic component workpiece using a single-ball extractor/placer apparatus having a heatable capillary tube pickup head optionally augmented with vacuum suction. A defective solder ball is identified, extracted by the pickup head and disposed of. A nondefective solder ball is picked up by the pickup head, positioned on the vacated attachment site, and thermally softened for attachment to the workpiece. Flux may be first applied to the replacement solder ball or to the vacated attachment site. The extractor/placer apparatus may be automated to locate, extract and replace defective balls for completion of a fully operable BGA.
Type:
Grant
Filed:
September 11, 2003
Date of Patent:
June 28, 2005
Assignee:
Micron Technology, Inc.
Inventors:
Kwan Yew Kee, Chew Boon Ngee, Keith Wong Bing Chiang