Patents Examined by Thi Dang
  • Patent number: 6610169
    Abstract: Systems and methods are disclosed to perform semiconductor processing with a process chamber; a flash lamp adapted to be repetitively triggered; and a controller coupled to the control input of the flash lamp to trigger the flash lamp. The system can deploy a solid state plasma source in parallel with the flash lamp in wafer processing.
    Type: Grant
    Filed: April 21, 2001
    Date of Patent: August 26, 2003
    Assignee: Simplus Systems Corporation
    Inventors: Tue Nguyen, Tai Dung Nguyen, Craig Alan Bercaw
  • Patent number: 6579374
    Abstract: The invention relates to an apparatus for growing thin films onto a substrate by exposing the substrate to alternate surface reactions of vapor-phase reactants for forming a thin film onto the substrate by means of said surface reactions. The apparatus comprises a vacuum vessel (1), a reaction chamber (2) with a reaction space into which the substrate can be transferred and which has infeed channels (6) for feeding therein the reactants used in said thin film growth process, as well as outlet channels (4) for discharging gaseous reaction products and excess reactants. According to the invention, said reaction chamber comprises a base part (9, 10) mounted stationary in respect to the interior of said vacuum vessel (1) and a movable part (18) adapted to be sealably closable against said base part of said reaction chamber. The invention makes it possible to improve the cleanliness of the substrate load chamber and to reduce the degree of substrate contamination.
    Type: Grant
    Filed: January 25, 2001
    Date of Patent: June 17, 2003
    Assignee: ASM Microchemistry Oy
    Inventors: Niklas Bondestam, Janne Kesälä, Leif Keto, Pekka T. Soininen
  • Patent number: 6576061
    Abstract: A substrate-processing method comprising transporting a substrate to pass through a plurality of processing spaces communicated with each other while processing said substrate in each processing space, characterized in that based on an inner pressure of (a) one of said plurality of processing spaces, said inner pressure of said processing space (a) and an inner pressure of (b) at least one of the processing spaces arranged before or after said processing space (a) are controlled.
    Type: Grant
    Filed: December 22, 1999
    Date of Patent: June 10, 2003
    Assignee: Canon Kabushiki Kaisha
    Inventors: Koichiro Moriyama, Masahiro Kanai, Hirokazu Ohtoshi, Tadashi Hori, Naoto Okada, Hiroshi Shimoda, Hiroyuki Ozaki
  • Patent number: 6572707
    Abstract: A vaporizer is provided for vaporizing sensitive liquid precursors in semiconductor processing applications. The vaporizer uses high flow conductance with large flow area to avoid precursor decomposition. The vaporizer also uses efficient heat conduction to avoid local cold spots due to the heat loss because of the transformation from the liquid to gas phase. The vaporizer convex surface configuration also allow a more uniform distribution of the vaporized liquid precursor. In some aspects of the invention, the vaporizer distributes the precursor to a larger area, thus eliminating the need for a showerhead.
    Type: Grant
    Filed: June 14, 2000
    Date of Patent: June 3, 2003
    Assignee: Simplus Systems Corporation
    Inventor: Tue Nguyen
  • Patent number: 6572732
    Abstract: The invention is embodied by a plasma reactor for processing a workpiece, including a reactor enclosure defining a processing chamber, a semiconductor window, a base within the chamber for supporting the workpiece during processing thereof, a gas inlet system for admitting a plasma precursor gas into the chamber, and an inductive antenna adjacent a side of the semiconductor window opposite the base for coupling power into the interior of the chamber through the semiconductor window electrode.
    Type: Grant
    Filed: November 27, 2001
    Date of Patent: June 3, 2003
    Assignee: Applied Materials Inc.
    Inventor: Kenneth S. Collins
  • Patent number: 6564744
    Abstract: The present invention provides a plasma CVD method for forming a plasma from a deposition material gas by application of an electric power, and thereby forming a film on a deposition target object in the plasma, wherein the formation of the plasma from the material gas is performed by applying an RF power and a DC power, and the DC power is applied to an electrode carrying the deposition target object. The present invention also provides a plasma CVD apparatus for forming a plasma from a deposition material gas by applying an electric power from the power applying means, and thereby forming a film on a deposition target object by exposing the deposition target object to the plasma, wherein the power applying means includes RF power applying means and DC power applying means, and the DC power applying means applies an electric power to the electrode carrying the deposition target object.
    Type: Grant
    Filed: October 18, 2001
    Date of Patent: May 20, 2003
    Assignee: Nissin Electric Co., Ltd.
    Inventors: Takahiro Nakahigashi, Akira Doi, Yoshihiro Izumi, Hajime Kuwahara
  • Patent number: 6564743
    Abstract: In an oxide film forming apparatus for a semiconductor device preprocessing time to measure concentration can be greatly shortened, and the oxide film can be formed with supreme reproducibility in stable manufacturing stages.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: May 20, 2003
    Assignee: Sony Corporation
    Inventor: Kenichi Hamasaki
  • Patent number: 6562248
    Abstract: A system for monitoring and controlling aperture etching in a complimentary phase shift mask is provided. The system includes one or more light sources, each light source directing light to one or more apertures etched on a mask. Light reflected from the apertures is collected by a measuring system, which processes the collected light. Light passing through the apertures may similarly be collected by the measuring system, which processes the collected light. The collected light is indicative of the depth and/or width of the openings on the mask. The measuring system provides depth and/or width related data to a processor that determines the acceptability of the aperture depth and/or width. The system also includes a plurality of etching devices associated with etching apertures in the mask. The processor selectively controls the etching devices so as to regulate aperture etching.
    Type: Grant
    Filed: March 26, 2001
    Date of Patent: May 13, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Ramkumar Subramanian, Bhanwar Singh, Michael K. Templeton
  • Patent number: 6562190
    Abstract: The present invention provides a system, apparatus, and method for processing a wafer using a single frequency RF power in a plasma processing chamber. The plasma processing system includes a modulated RF power generator, a plasma processing chamber, and a match network. The modulated RF power generator is arranged to generate a modulated RF power. The plasma processing chamber is arranged to receive the modulated RF power for processing the wafer and is characterized by an internal impedance during the plasma processing. The plasma processing chamber includes an electrostatic chuck for holding the wafer in place with the electrostatic chuck including a first electrode disposed under the wafer for receiving the modulated RF power. The plasma processing chamber further includes a second electrode disposed over the wafer. The modulated RF power generates plasma and ion bombardment energy for processing the wafer.
    Type: Grant
    Filed: October 6, 2000
    Date of Patent: May 13, 2003
    Assignee: Lam Research Corporation
    Inventors: Andras Kuthi, Andreas Fischer
  • Patent number: 6558506
    Abstract: The present invention provides an etching system having a plurality of etching chambers (16, 18, 20) disposed about a transfer chamber (14), wherein the etching chambers are adapted to be selectively mounted at different positions with respect to the transfer chamber.
    Type: Grant
    Filed: October 24, 2001
    Date of Patent: May 6, 2003
    Assignee: Tokyo Electron Limited
    Inventors: Richard J. Freeman, Jay R. Wallace, Yoichi Kurono, Arthur H. Laflamme, Jr., Louise Smith Barriss, Tadashi Onishi
  • Patent number: 6554953
    Abstract: A plasma reactor and methods for processing semiconductor substrates are described. An induction coil inductively couples power into the reactor to produce a plasma. A thin electrostatic shield is interposed between the induction coil and plasma to reduce capacitive coupling. The shield is electromagnetically thin such that inductive power passes through the shield to sustain the plasma while capacitive coupling is substantially attenuated. Reducing capacitive coupling reduces modulation of the plasma potential relative to the substrate and allows for more controllable processing.
    Type: Grant
    Filed: September 13, 2001
    Date of Patent: April 29, 2003
    Assignee: CTP, Inc.
    Inventor: Jean-François Daviet
  • Patent number: 6553932
    Abstract: An appparatus for confining plasma within a process zone of a substrate processing chamber. In one aspect, an apparatus comprises an annular member having an upper mounting surface, an inner confinement wall, and an outer confinement wall. The apparatus is disposed on or otherwise connected to a gas distribution assembly of the processing chamber to prevent plasma edge effects on the surface of a substrate. The apparatus provides a plasma choke aperture that reduces the volume of the process zone around the periphery of the substrate thereby eliminating uneven deposition of material around the edge of the substrate.
    Type: Grant
    Filed: May 11, 2001
    Date of Patent: April 29, 2003
    Assignee: Applied Materials, Inc.
    Inventors: Kuo-Shih Liu, Ramana Veerasingam, Zhi Xu, Ping Xu, Mario Dave Silvetti, Gang Chen
  • Patent number: 6553933
    Abstract: This invention provides an apparatus for injecting gas within a plasma reactor and tailoring the distribution of an active species generated by the remote plasma source over the substrate or wafer. The distribution may be made more or less uniform, wafer-edge concentrated, or wafer-center concentrated. A contoured plate or profiler is provided for modifying the distribution. The profiler is an axially symmetric plate, having a narrow top end and a wider bottom end, shaped to redistribute the gas flow incident upon it. The profiler is situated below an input port within the plasma reactor chamber and above the wafer. The method for tailoring the distribution of the active species over the substrate includes predetermining the profiler diameter and adjusting the profiler height over the substrate.
    Type: Grant
    Filed: July 2, 2001
    Date of Patent: April 29, 2003
    Assignee: Novellus Systems, Inc.
    Inventors: Ronald Allan Powell, Gabriel I. Font-Rodriguez, Simon Selitser, Emerson Derryck Settles
  • Patent number: 6554952
    Abstract: Disclosed is an inventive method for etching a gold metallization in a plasma processing chamber. The method includes introducing a substrate having a gold layer and an overlying titanium hardmask layer into the plasma processing chamber. The hardmask is first etched using conventional etching techniques. Then a plasma is formed in the chamber from an oxidizing gas and an etching gas. The etching gas is preferably a hydrochloric acid containing gas which may contain a chlorine containing gas. In addition, N2 may be provided. The plasma is then used to etch the gold layer through the titanium hardmask.
    Type: Grant
    Filed: September 14, 2001
    Date of Patent: April 29, 2003
    Assignee: Lam Research Corporation
    Inventors: Gladys So-Wan Lo, David W. Mytton, Greg Goldspring
  • Patent number: 6551444
    Abstract: A plasma processing apparatus and a method of plasma processing using the same obviate a problem in which an excessive amount of processing gas is supplied momentarily during an initial stage of the gas supply. In the process of supplying gas, a main controller outputs to a mass flow controller a flow-rate setting command signal preset for “zero flow” prior to opening a gas shut-off valve, which opens/closes a gas supply passage, and another flow-rate setting command signal set for “a specific flow rate” only after the gas shut-off valve is opened.
    Type: Grant
    Filed: April 9, 2002
    Date of Patent: April 22, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tetsuhiro Iwai, Ryota Furukawa
  • Patent number: 6551442
    Abstract: A method of producing a semiconductor device having a multilayered wiring conductors and a system for producing the same. The nonuniformity of SOG coating film effectively suppressed and various treatments are simple and less time-consuming. A wiring conductor is formed on a semiconductor substrate, and an insulating layer covering the wiring conductor and the semiconductor substrate is formed, and the insulating layer is then subjected to a wet etching prior to the formation of SOG layer, thereby to increase a wettabiltity by the coating solution on the insulating layer.
    Type: Grant
    Filed: January 23, 2001
    Date of Patent: April 22, 2003
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Kojiro Yuzuriha
  • Patent number: 6551445
    Abstract: A parallel plate ECR plasma processing system is able to extend a plasma density region capable of keeping a continuous, uniform state. In this system, a first magnetic field-forming means formed of a solenoid coil and a second magnetic field-forming means are provided so that a the distribution of a direction of a magnetic line of flux on the surface of a planar plate is controlled by a combined magnetic field from the first and second magnetic field-forming means thereby controlling the distribution in degree of the interactions of the magnetic field and an electromagnetic wave. This control ensures the uniformity of a plasma under high density plasma formation conditions, thus enabling one to form a continuous plasma over a wide range of low to high densities. Thus, there can be realized a plasma processing system that ensures processing under wide plasma conditions including high-speed processing under high density conditions.
    Type: Grant
    Filed: September 19, 2000
    Date of Patent: April 22, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Ken'etsu Yokogawa, Yoshinori Momonoi, Nobuyuki Negishi, Masaru Izawa, Shinichi Tachi
  • Patent number: 6551447
    Abstract: A plasma reactor and methods for processing semiconductor wafers are described. Gases are introduced into a reactor chamber. An induction coil surrounds the reactor chamber. RF power is applied to the induction coil and is inductively coupled into the reactor chamber causing a plasma to form. A split Faraday shield is interposed between the induction coil and the reactor chamber to substantially block the capacitive coupling of energy into the reactor chamber which may modulate the plasma potential. The configuration of the split Faraday shield may be selected to control the level of modulation of the plasma potential. For etch processes, a separate powered electrode may be used to accelerate ions toward a wafer surface. For isotropic etching processes, charged particles may be filtered from the gas flow, while a neutral activated species passes unimpeded to a wafer surface.
    Type: Grant
    Filed: November 6, 2000
    Date of Patent: April 22, 2003
    Assignee: Mattson Technology, Inc.
    Inventors: Stephen E. Savas, Brad S. Mattson, Martin L. Hammond, Steven C. Selbrede
  • Patent number: 6540839
    Abstract: An apparatus and method is provided for uniformly coating a magnet having a plurality of surfaces and includes a reaction chamber having a port for introducing the magnet into the reaction chamber. A heater is also included for heating the reaction chamber. Also, a carrier gas port is in fluid communications with the reaction chamber for introducing a carrier gas into the reaction chamber. In addition, a reactant gas port is in fluid communications with the reaction chamber for introducing a reactant gas into the reaction chamber. When the magnet and the carrier gas are introduced into the reaction chamber, the magnet becomes suspended in the reaction chamber. Also, when the reactant gas is introduced into the reaction chamber, the reactant gas causes all of the plurality of surfaces of the magnet to be uniformly coated.
    Type: Grant
    Filed: March 29, 2001
    Date of Patent: April 1, 2003
    Assignee: Seagate Technology LLC
    Inventors: Walter Lee, Roger Lee Hipwell, Jr., Wayne Allen Bonin, Barry Dean Wissman, Zine-Eddine Boutaghou, Peter Crane
  • Patent number: 6540837
    Abstract: Described herein is a process chamber with a substantially all-quartz interior surface. The preferred embodiments have upper and lower walls being curved in both the x-z and y-z planes. In one embodiment, the chamber has thin upper and lower dome walls made from a generally transparent material such as quartz, each with a convex exterior surface and a concave interior surface. These walls are joined at their side edges to a cylindrical side wall, preferably formed from a generally translucent material such as bubble quartz. The upper and lower walls and the side wall substantially enclose an all-quartz interior surface, except for apertures used for gas inlet and outlet, wafer intrusion and extraction and wafer retention. An internal reinforcement extends along the entire interior perimeter of the chamber to provide additional strength and support to the chamber. An external reinforcement surrounds the cylindrical side wall to confine outward expansion of the chamber.
    Type: Grant
    Filed: November 26, 2001
    Date of Patent: April 1, 2003
    Assignee: ASM America, Inc.
    Inventor: Ivo Raaijmakers