Abstract: An apparatus for video signal processing satisfactorily synthesizes images by using field memories and includes control circuit for controlling an operation for making an image, first and second field memories in which image data is written under the control of the control circuit, and output circuit for outputting image data alternately read out from the first and second field memories at a field period as a video signal to be displayed in an interlace fashion, wherein a vertical direction coordinate of coordinate data written in the second memory is shifted from a vertical coordinate written in the first field memory by half of a horizontal line.