Abstract: A method of planarizing an electrical contact region in a silicon substrate uses spin-on-glass or polysilicon as plug material (42) to fill a contact hole (34). A device or doped region (31) is formed at the surface of the substrate (30) and an insulating layer (33) is formed over the substrate so that the entire doped region is covered by the insulating layer. The contact hole is then formed through the insulating layer to expose a portion of the doped region. To increase the conductivity of the doped region through the contact hole, a filler layer of either spin-on-glass or polysilicon, thick enough to substantially fill the contact hole, is formed over the insulating layer. The filler layer is then etched away from the portions around the contact hole by a conventional dry or wet oxide etching process.