Patents Examined by Thuy-Trans N. Huynh
  • Patent number: 5706004
    Abstract: A system for reducing noise coupling in a mixed-signal IC includes a digital clock, an analog clock, and gating signal generator, and a gating circuit. The gating circuit receives a digital clock signal and the gating pulse to generate a gated digital clock signal having no pulses at a sampling edge of the analog clock signal to provide a "quiet time" for analog sampling.
    Type: Grant
    Filed: September 18, 1995
    Date of Patent: January 6, 1998
    Assignee: Phylon Communications, Inc.
    Inventor: Michael K. Yeung