Patents Examined by Tim M. Bonura
  • Patent number: 6785845
    Abstract: A system for testing an application running on a point-of-sale (POS) terminal comprises a host running on a personal computer connected to the POS terminal, and a target running on the POS terminal. The host sends simulated keystrokes, card swipes and the like to the target, which passes these to the application under test. The target can send information to the host regarding the POS terminal status, such as the screen display, so that the host can send the simulated keystrokes, etc., to the target on a need basis. The host can also receive other data and send instructions to the target, e.g. it can obtain available RAM space details, file details and system clock details, and can send instructions to restart the application.
    Type: Grant
    Filed: April 10, 2001
    Date of Patent: August 31, 2004
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Kartik Venkataraman
  • Patent number: 6662314
    Abstract: A microcomputer of the present invention permits a direct control of a rewrite operation on an internal flash-memory to enhance the efficiency of a debugging operation. The microcomputer has a first storage means that stores a program for rewriting data into an internal flash memory, a second storage means that stores internal flash information about the internal flash memory, an interface that makes a connection to a debugging tool, and a CPU. The CPU allows reading of the internal flash information by the debugging tool through the interface, receiving of write data based on the internal flash information from the debugging tool through the interface, and rewriting of the write data as new contents into the internal flash memory in accordance with the program for rewriting data into the internal flash memory.
    Type: Grant
    Filed: April 13, 2000
    Date of Patent: December 9, 2003
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Shunichi Iwata, Takashi Nasu, Fumitaka Fukuzawa
  • Patent number: 6658599
    Abstract: A method, system, and apparatus for managing a failed input/output adapter within a data processing system is provided. In one embodiment, an operating system handler receives an indication that one of a plurality of input/output adapters has failed. The operating system handler consults an error log to determine which input/output adapter has failed. Once the bad input/output adapter has been determined, the operating system handler disables the bad input/output adapter and deallocates any processes bound for the bad input/output adapter without powering down the data processing system. A user is then notified of the bad input/output adapter so that the bad input/output adapter can be replaced. The input/output adapter may be replaced without powering down the data processing system. Once the bad input/output adapter has been replace, the new input/output adapter is enabled.
    Type: Grant
    Filed: June 22, 2000
    Date of Patent: December 2, 2003
    Assignee: International Business Machines Corporation
    Inventors: Stephen Dale Linam, Michael Anthony Perez, Louis Gabriel Rodriguez, Mark Walz Wenning
  • Patent number: 6643803
    Abstract: Emulation and debug circuitry is provided that can be incorporated into a variety of digital systems. A stop mode of operation is provided in which an associated processor stops processing instructions in response to a debug event. A real-time mode of operation is provided in which the processor stops processing background instructions in response to a debug event, but in which high priority interrupts are still processed. While running or suspended, the emulation circuitry can jam an instruction into the instruction register of the processor to cause processor resources to be read or written on behalf of the emulation circuitry. An embodiment of a processor core is provided that is a programmable digital signal processor (DSP) with variable instruction length, offering both high code density and easy programming. Architecture and instruction set are optimized for low power consumption and high efficiency execution of DSP algorithms, such as for wireless telephones, as well as pure control tasks.
    Type: Grant
    Filed: January 14, 2000
    Date of Patent: November 4, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Gary L. Swoboda, David R. Matt
  • Patent number: 6615365
    Abstract: The invention provides systems and methods for storing and recovering images in a computer partition, and more particularly to tools and techniques for placing and extracting images to and from the same partition that is imaged. Both a factory image and a user-updateable image may be stored on the same partition. Copies of a portion of the partition data and/or the system data for the imaged partition can be stored at a specified location within the imaged partition, in a separate partition, or on a removable recovery medium, thereby allowing images to be recovered after disruption of the imaged partition's system data. The image may be stored contiguously or non-contiguously. The image may also be stored as a system file or as an image container which comprises one or more than one image file. To speed restoration time and to assist recovery, the image may be stored at or near the end of the partition. Familiar or novel image formats may be used.
    Type: Grant
    Filed: March 22, 2000
    Date of Patent: September 2, 2003
    Assignee: PowerQuest Corporation
    Inventors: Roy M. Jenevein, Heidi S. Kramer, Derrick S. Shadel, Andy V. Lawrence, Val A. Arbon
  • Patent number: 6591380
    Abstract: The highly reliable distributed system is composed of a communication protocol processing unit which comprises a mailbox for storing a communication message, and executes communication protocol processing between data of an application program and a network controller using the network controller performing network communication of the message in the mailbox; an error detection coding unit; an error detection decoding unit which reconverts data converted from communication data by the error detection coding unit to the original data, and detects that the content of the data is damaged if it is damaged; and a data comparing unit for checking whether or not two kinds of data agree with each other.
    Type: Grant
    Filed: December 6, 1999
    Date of Patent: July 8, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Wataru Nagaura, Takanori Yokoyama, Shoji Suzuki, Satoru Kuragaki, Takaaki Imai
  • Patent number: 6587970
    Abstract: A method and apparatus for detecting a change in the operational status of a first host computer and automatically configuring a second host computer to provide additional computing resources that replace or complement the first host computer. In one embodiment, a controller is provided that is capable of detecting a malfunction or failure of the first computer and automatically configuring a second host computer to replace the first host computer. In another embodiment, the controller is capable of detecting changes in the performance of the first host computer and automatically configuring a second host computer to provide additional computing resources for the first host computer. In a further embodiment, both of these techniques can be used to support an electronic commerce site and provide the electronic commerce site with failsafe operation and virtually unlimited computational resources.
    Type: Grant
    Filed: March 22, 2000
    Date of Patent: July 1, 2003
    Assignee: EMC Corporation
    Inventors: Yao Wang, Mohamed Chehadeh, Quang Vu