Patents Examined by Timothy J Thompson
  • Patent number: 11557889
    Abstract: A system for pulling wire behind a wall is provided. One embodiment comprises a cylindrical weight defined by an outside diameter and a first length, and a tubular body with a hollow interior defined by an inside diameter that is greater than the outside diameter of the cylindrical weight and a second length that is greater than the first length. A distal end of the tubular body includes a tip configured to penetrate a material that is behind the wall, wherein when oriented in a vertical position behind the wall, and wherein in response to drawing the cylindrical weight upward through the tubular body and then releasing the cylindrical weight, the cylindrical weight travels downward towards the distal end of the tubular body and impacts the tip such that momentum of the downward travelling cylindrical weight is transferred to the tip, thereby driving the tubular body downward through the material.
    Type: Grant
    Filed: May 3, 2021
    Date of Patent: January 17, 2023
    Assignee: PROMETHEAN INNOVATIONS, LLC
    Inventor: Christopher Kaleshnik
  • Patent number: 11552576
    Abstract: A power apparatus includes a first power bus bar provided at a first power part, a second power bus bar provided at a second power part coupled to the first power part while communicating internally with the first power part, the second power bus bar being fastened to the first power bus bar, a first interlock bus bar provided at the first power part while being connected to an interlock terminal of a controller disposed within the first power part, a second interlock bus bar provided at the second power part while being fastened to the first interlock bus bar, and a safety cover fastened to a fastening portion between the first interlock bus bar and the second interlock bus bar while covering a fastening portion between the first power bus bar and the second power bus bar.
    Type: Grant
    Filed: July 1, 2020
    Date of Patent: January 10, 2023
    Assignees: Hyundai Motor Company, Kia Motors Corporation
    Inventors: Jae Hoon Yoon, Sang Chan Jeong, Hyong Joon Park
  • Patent number: 11551869
    Abstract: A multilayer electronic component that includes a plurality of stacked dielectric layers, each of the plurality of stacked dielectric layers having a plurality of crystal grains, at least some of the plurality of crystal grains having a trap portion therein, and at least one element selected from the group consisting of Ni, Cu, Pt, Sn, Pd and Ag is present locally in the trap portion; and a plurality of internal electrode layers arranged between adjacent dielectric layers of the plurality of stacked dielectric layers.
    Type: Grant
    Filed: June 23, 2020
    Date of Patent: January 10, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Hideyuki Hashimoto, Kenji Ueno
  • Patent number: 11551872
    Abstract: A multilayer ceramic capacitor includes a capacitive element including a ceramic layer, a first internal electrode layer, and a second internal electrode layer, the capacitive element including a first and second principal surfaces, first and second side surfaces, and first and second end surfaces. The first and second internal electrode layers respectively extend to the first and second end surfaces, at least a portion of each of the first and second end surfaces are covered with a conductor layer, a portion of the conductor layer is covered with an insulating portion, at least a portion of the conductor layer and at least a portion of the insulating portion are covered with the underlayer external electrode layer when viewed from the first end surface and the second end surface, and at least a portion of the underlayer external electrode layer is covered with a plating layer.
    Type: Grant
    Filed: March 5, 2020
    Date of Patent: January 10, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Masahiro Wakashima
  • Patent number: 11548663
    Abstract: A cable (130) includes an electrical wire band (134). A parallel electrical wire (133) is formed by arranging a pair of a first electrical wire (131) and a second electrical wire (132) without being twisted together. The electrical wire band is formed by arranging a plurality of parallel electrical wires in a lateral row. In addition, between two adjacent parallel electrical wires, a second electrical wire of one parallel electrical wire is arranged adjacently to a first electrical wire of the other parallel electrical wire. Further, the electrical wire band is wound and accommodated in a spiral spring shape in a cable wrap mechanism (100).
    Type: Grant
    Filed: December 29, 2016
    Date of Patent: January 10, 2023
    Assignee: Mitsubishi Electric Corporation
    Inventor: Shunichi Kawamura
  • Patent number: 11551867
    Abstract: The present invention provides a dielectric composition having high relative permittivity and insulation resistance at high temperature. The dielectric composition includes a main component expressed by a compositional formula (Sr1-x, Cax)m(Ti1-yHfy)O3-?N?, in which 0<x?0.15, 0<y?0.15, 0.90?m?1.15, and 0<??0.05 are satisfied.
    Type: Grant
    Filed: September 28, 2020
    Date of Patent: January 10, 2023
    Assignee: MAEDA & SUZUKI PATENT CO., LTD.
    Inventors: Masamitsu Haemori, Toshio Asahi, Hitoshi Saita
  • Patent number: 11551856
    Abstract: A coil component according to one or more embodiments includes a base body having first to sixth surfaces, and a coil conductor including a winding portion that extends around a coil axis intersecting the first and second surfaces. The winding portion includes first, second, third, and fourth portions facing the third, fourth, fifth, and sixth surfaces, respectively when viewed from a direction of the coil axis. The radii of curvature of the first and second portions are both smaller than the radii of curvature of the third and fourth portions. When viewed from the direction of the coil axis, the distance between the first portion and the third surface and the distance between the second portion and the fourth surface are both larger than the distance between the third portion and the fifth surface and the distance between the fourth portion and the sixth surface.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: January 10, 2023
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Satoshi Tokunaga, Tomoo Kashiwa
  • Patent number: 11545299
    Abstract: An electronic component includes an insulating layer, a low voltage conductor pattern formed inside the insulating layer, a high voltage conductor pattern formed inside the insulating layer such as to face the low voltage conductor pattern in an up/down direction, and a withstand voltage enhancement structure of conductive property formed inside the insulating layer and along the high voltage conductor pattern such as to protrude further outside than the low voltage conductor pattern in plan view.
    Type: Grant
    Filed: October 15, 2018
    Date of Patent: January 3, 2023
    Assignee: ROHM CO., LTD.
    Inventors: Taketoshi Tanaka, Kosei Osada, Masahiko Arimura
  • Patent number: 11545802
    Abstract: An electronic device includes a fork structure having a pair of arms disposed in spaced relation and defining an open-ended channel therebetween. A surface of channel defines a seat opposite the open end. The channel has a width W1 at its narrowest section. A rigid wire of an electrical component is disposed in the channel generally adjacent to the seat. The wire has a width W2 that is greater than the width W1 so surfaces of the channel at the narrowest section defined by width W1 interfere with the wire, preventing the wire from moving towards the open end of the channel. The pair of arms are constructed and arranged to be moved toward each other so as to crimp the wire to the fork structure.
    Type: Grant
    Filed: January 16, 2020
    Date of Patent: January 3, 2023
    Assignee: VITESCO TECHNOLOGIES USA, INC.
    Inventors: Andrew Wisniewski, Laura Noel Church
  • Patent number: 11538621
    Abstract: A multilayer coil component includes a multilayer body formed by stacking a plurality of insulating layers in a length direction and that has a built-in coil, and first and second outer electrodes that are electrically connected to the coil. The coil is formed by a plurality of coil conductors stacked in the length direction being electrically connected to each other. The first and second outer electrodes respectively cover parts of first and second end surfaces and parts of a first main surface. The length of a region in which the coil conductors are arranged in the stacking direction lies in a range from 85% to 95% of the length of the multilayer body. The sum of the numbers of stacked coil conductors that face the parts of the first and second outer electrodes extending along the first main surface is less than or equal to twelve.
    Type: Grant
    Filed: May 22, 2020
    Date of Patent: December 27, 2022
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Atsuo Hirukawa, Yuki Nishikawa
  • Patent number: 11532926
    Abstract: A routing structure of a shielded electric wire, the shielded electric wire including an electric wire and a resin tube is routed in a state of being bent, the resin tube including a shield layer, an inner-side resin and an outer-side resin, the shield layer being interposed between the inner-side resin and the outer-side resin, is provided. A tensile strength of the inner-side resin and the outer-side resin is greater than a bending stress to be generated when the shielded electric wire is bent with a minimum bend radius in the routing structure. The shield layer has a shield resistance equal to or smaller than 103.8 m?/m and a shield density equal to or greater than 50%, the shield density being a ratio of an area of a surface of the electric wire covered by the shield layer to an area of the surface of the electric wire.
    Type: Grant
    Filed: November 16, 2021
    Date of Patent: December 20, 2022
    Assignee: YAZAKI CORPORATION
    Inventors: Satoko Hongo, Hiroki Kondo
  • Patent number: 11530512
    Abstract: An infrared stealth cloth includes a cloth substrate and an infrared light absorber located on the cloth substrate. The infrared light absorber includes a first drawn carbon nanotube film, a second drawn carbon nanotube film, and a third drawn carbon nanotube film stacked on each other. The first drawn carbon nanotube film includes a plurality of first carbon nanotubes substantially extending along a first direction. The second drawn carbon nanotube film includes a plurality of second carbon nanotubes substantially extending along a second direction. The third drawn carbon nanotube film includes a plurality of third carbon nanotubes substantially extending along a third direction. The first direction and the second direction form an angle of about 42 degrees to about 48 degrees, and the first direction and the third direction form an angle of about 84 degrees to about 96 degrees.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: December 20, 2022
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Yuan-Hao Jin, Qun-Qing Li, Shou-Shan Fan
  • Patent number: 11527362
    Abstract: A multi-layer ceramic capacitor includes: a first region including a polycrystal including, as a main component, crystal grains free from intragranular pores; a second region that includes a polycrystal including, as a main component, crystal grains including intragranular pores and includes a higher content of silicon than a content of silicon in the first region; a capacitance forming unit including ceramic layers laminated along a first direction, and internal electrodes disposed between the ceramic layers; and a protective portion including a cover that covers the capacitance forming unit and constitutes a main surface facing in the first direction, a side margin constituting a side surface facing in a second direction orthogonal to the first direction, and a ridge constituting a connection portion, the connection portion connecting the main surface and the side surface to each other. The ceramic layers include the first region. The ridge includes the second region.
    Type: Grant
    Filed: January 30, 2020
    Date of Patent: December 13, 2022
    Assignee: TAIYO YUDEN CO., LTD.
    Inventor: Yoichi Kato
  • Patent number: 11522351
    Abstract: A wire management system including a cord cover. A kit of the wire management system can include a plurality of cord covers having various sizes or shapes to enable arrangement over cords or cables of various lengths without having to cut the cord covers to particular sizes. Various connectors can be used to cover or couple adjacent cord covers.
    Type: Grant
    Filed: May 8, 2020
    Date of Patent: December 6, 2022
    Inventor: Albert Santelli, Jr.
  • Patent number: 11520311
    Abstract: The present disclosure relates to a device for reading from and/or writing to a removable storage card. The device can comprise a housing including a wall defining a housing opening sized to receive a removable storage card. The device can also comprise a thermal management system attached to at least a part of the wall of the housing. Additionally, the device can comprise a biasing mechanism interoperable with the housing and configured to bias a card surface of the removable storage card into thermal communication with the thermal management system in response to insertion of the removable storage card into the housing opening. In some aspects, the biasing mechanism includes one or more elastic members configured to apply a biasing force to the removable storage card in response to the insertion of the removable storage card into the housing opening.
    Type: Grant
    Filed: July 25, 2019
    Date of Patent: December 6, 2022
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Michael Lau, Julia Purtell
  • Patent number: 11522533
    Abstract: Provided is a semiconductor device capable of suppressing increase in size of a package and adjusting an amount of negative feedback. A power module as a semiconductor device includes an IGBT which is a switching element and a free wheel diode (FWD) parallelly connected to the switching element. The IGBT has, on a surface thereof, an emitter electrode and a gate electrode of the IGBT and a conductive pattern insulated from the emitter electrode and the gate electrode. The FWD has, on a surface thereof, an anode electrode of the FWD and a conductive pattern insulated from the anode electrode.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: December 6, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventor: Hiroyuki Nakamura
  • Patent number: 11518322
    Abstract: A boom for an electrical harness, including a straight bar extending in a longitudinal direction, and several supports distributed along and attached to the bar, to which supports at least one electrical harness is connected in operation. The bar includes at least two parts configured to slide relative to one another in the longitudinal direction so that a length of the bar can be adjusted.
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: December 6, 2022
    Assignee: AIRBUS OPERATIONS SAS
    Inventors: GĂ©rard Millet, Vincent Delpy
  • Patent number: 11515697
    Abstract: A high-voltage cable sealing end (100) has a primary volume (102) and a secondary volume (104) fluidically connected thereto, which are filled with an insulating fluid. The primary volume (102) and the secondary volume (104) are sealed with respect to the atmosphere surrounding the high-voltage cable sealing end (100). The secondary volume (104) can be disconnected from the primary volume (102) via a separable connection (106) which can be cut off in a fluid-tight manner. A drying agent, which draws moisture out of the insulating fluid, is introduced into the secondary volume (104).
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: November 29, 2022
    Assignee: NEXANS
    Inventors: Christian Frohne, Pierre Mirebeau, Nicolas Lallouet, Quentin Eyssautier, Abdellatif Ait Amar
  • Patent number: 11516911
    Abstract: A glass circuit board includes, on a glass substrate, a stress relief layer, a seed layer, and an electroplated layer including copper plating. The stress relief layer is an insulator formed by dry coating method and applies a compressive residual stress to the glass substrate at room temperature. The stress relief layer thus reduces cracking, fracturing or warpage of the glass substrate caused by thermal expansion and shrinkage of the copper plating due to heating and cooling of the glass circuit board during manufacturing or thermal cycling, ensuring high connection reliability of the glass circuit board.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: November 29, 2022
    Assignee: TOPPAN PRINTING CO., LTD.
    Inventor: Masahiko Kijima
  • Patent number: 11515693
    Abstract: In an example embodiment, a junction box may include a flashing. The flashing may define a first groove. The first groove may be disposed relative to a first center axis on a first plane. The junction box may also include a housing. The housing may include a bottom portion. The bottom portion may define a second groove. The second groove may be disposed relative to a second center axis. The second center axis may be coincident with the first center axis in a direction that is substantially parallel to the first plane of the first groove. In addition, the second groove may be located on a second plane that is substantially parallel to the first plane of the first groove. Further, the second groove may be configured to indicate a suitable hole position in the bottom portion.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: November 29, 2022
    Assignee: EASY SOLAR PRODUCTS, LLC
    Inventors: Benjamin Wade, Lee Hatley