Abstract: A decryption device, comprising a substrate, a plurality of encrypted information symbols located within a rectangular array of further symbols carried by the substrate, wherein the array is arranged in a predetermined number of rows by a further predetermined number of columns. A pair of registration marks are carried by the substrate and located on opposite sides of a predetermined one of the rows. An overlay is adapted for covering the rectangular array, and includes a first pair of apertures arranged to uncover the pair of registration marks, and a plurality of further apertures arranged to uncover the plurality of encrypted information symbols responsive to the first pair of apertures uncovering the pair of registration marks.

Abstract: A simple and inexpensive apparatus for encoding and decoding messages is disclosed. The apparatus comprises a first surface having a first series of indicia and a second surface having a series of letters. Each of the letters correspond to a unique one of the indicia. The device further includes a cover for rotating one of the surfaces through a plurality of positions and sequentially revealing one of the indicia and its corresponding letter.

Abstract: A data processor includes a data unscrambling unit. The unit includes a memory circuit for storing data supplied thereto in a scrambled form, the data stored in the memory circuit being thereafter read out therefrom in an order which is to be the unscrambled form. The memory circuit includes a memory cell array, a set of first terminals supplied with a write address having a value which is changed one by one, a data write control circuit for writing data into the memory cell array in a first order in accordance with changes in value of the write address. A set of second terminals is supplied with a read address having a value which is changed one by one. A data read control circuit reads out data from the memory cell array in a second order that is different from the first order, the read out being in accordance with a change in value of the read address.

Abstract: A server-aided computation method using a main unit for processing secret information and at least one auxiliary unit for supporting a computation that said main unit executes, said method comprising the steps of generating d' from a secret key d' using m random numbers R.sub.i (where i=l, . . . , m) generated by said main unit having secret keys n and d, transferring d' and n from said main unit to said auxiliary unit, computing the following equation from a message block C in said auxiliary unitM'=C.sup.d' mod ncomputing X using said random numbers R.sub.i and n in said main unit while computing M' in said auxiliary unit, transferring M' from said auxiliary unit to said main unit, and computing a message block M using the following equation in said main unit.M=M'.multidot.

Abstract: An apparatus for preventing a direct turning-in of the supersonic wave from the opening of the sender to the opening of the receiver in a supersonic wave device for a vehicle in which an object placed near the vehicle body id detected by the supersonic wave. A cylindrical turning-in preventive member made of foamed material having discrete bubbles is arranged at the opening of the sender or the receiver.

Abstract: An antenna control data transfer system having antenna elements, phase shifters changing the phase of electromagnetic waves transmitted or received by the antenna elements, and phase shifter control circuits controlling the phase shifters, wherein each of the phase shifter control circuits includes an address holding circuit storing an address for identifying the phase shifter control circuit, a data input circuit for receiving data, and a data output control circuit for selectively outputting the received data or inhibiting the data output in accordance with a control signal from a signal processor.

Abstract: Methods and apparatus for modulo 2 addition based encryption by block substitution techniques which allows use of the substitution scheme with relatively simple hardware. The block substitution, a one to one mapping of n bit binary numbers onto themselves, is based on the fact that certain permutations of the n bit binary numbers define a block substitution by modulo 2 addition of one permuted set of numbers to another, and that a subset of these define equations having an additive relationship when viewed as vectors. This allows the simple changing of the transformation on a frequent basis. Various properties of the transformations and methods of using the same are disclosed.

Abstract: Electronic antenna-rotation compensation apparatus is provided for correcting data errors introduced into radar return signals by the rotation of phased array antennas. The apparatus includes circuitry for sampling and A-to-D converting I (in phase) and Q (quadrature) radar return signal components provided by individual antenna elements comprising the array antenna and for providing and applying correction factors to each ith signal components sample from each nth element across the antenna. The correction factors may be precomputed and stored in a memory for use when required or may be computed as needed. The corrected, digital I and Q signal component samples are supplied to a conventional processor, for example, as adaptive array processor, for extracting useful target data from return signal interference and clutter. A corresponding method is provided for compensating for the effects of phased array antenna rotation.

Abstract: The radio station comprises a receiver antenna system responsive to direct transmissions from each of the other radio stations in the system with two remote transmitters operated alternately, i.e. one can be moved while the other is transmitting. The antennae system provides input signals to a receiver bank, each receiver being responsive to the current transmission frequency of a respective one of the other radio stations in the system. The received signals, comprising packets of data addressed to a particular station, are processed in decrypt section and switch section, then the data packets are either passed to a database, one of the workstations or rejected, depending on the addressee of each packet. Data from the database or any of the workstations for transmission to specified addresses are processed and stored in the switch section ready to be transmitted from one of the two remote transmitters during one or more subsequent transmission periods.

Abstract: An improvement in a coprocessor system for correcting for drifts in directions of navigation gyros, by means of satellite navigation information from global positioning satellites. Values of gyro navigation information from the gyros are interpolated to values that are valid at a cycle time. A cycle time is a time when the satellite navigation information is valid. The interpolated gyro navigation information is coprocessed with the satellite navigation information to arrive at accurate gyro drift terms. The gyro drift terms are used in correcting for the drifts in the navigation gyros.

Abstract: The growth of a hydraulic fracture increases the period of free oscillations in the well connected to the fracture. Simultaneously, the decay rate of free oscillations decreases. The properties of forced oscillations in a well also change during fracture growth. All of these effects result from the changing impedance of the hydraulic fracture that intersects the well. Hydraulic fracture impedance can be defined in terms of the hydraulic resistance and the hydraulic capacitance of a fracture. Fracture impedance can be determined directly by measuring the ratio of down hole pressure and flow oscillations or indirectly from well head impedance measurements using impedance transfer functions. Well head pressure measurements can also be used to evaluate fracture impedance by comparing them to pressure oscillations computed with hydraulic models that include fractures with different impedances.

Abstract: A spread spectrum signal demodulation circuit includes a multiplier which multiplies an input spread spectrum signal by a demodulation PN code, and a demodulation PN code generator generates the demodulation PN code by utilizing an oscillation signal from a VCO as a clock signal thereof. An output of the multiplier is given to a bandpass filter and an output of which is integrated by an integration circuit. A first integrated value for a first time is compared with a second integrated value for a second time later than the first time and, in accordance with a comparison result, a frequency of the oscillation signal of the VCO is changed so that the demodulation PN code is synchronized with a modulation PN code included in the input spread spectrum signal.

Abstract: An off-line processor arrangement for a broadband accelerated convergence adaptive antenna array wherein signals from a plurality of antenna elements are applied to respective identical tapped delay lines (T) the outputs of which are fed through individual signal weighting means to a beamforming network (BFN), the arrangement including one or more lattice filter means (LF) to which the auxiliary antenna element signals are applied together with the output response of the beamforming network to compute sets of weight correction vectors (* W) with which to update weight coefficients and means for storing said updated coefficients, said stored coefficients being applied to the individual signal weighting means to weight the outputs of the tapped delay lines.

Abstract: A simulated reception signal is produced by modulating an AC signal having the same frequency as the reception frequency with a modulating signal produced using two pseudo noise codes delayed by 1/2 or 3 chips. In a calibrating mode, in which the simulated reception signal is chosen, a reference voltage to a comparator for synchronization detection and an output voltage of a differential amplifier for synchronization holding are stored in a CPU. In a receiving mode, in which an actual reception signal is chosen, the CPU controls the comparator and a pseudo noise generator which is included in a delay lock loop on the basis of the stored data.

Abstract: A security kernel of a secure processing system for providing security management, key management and kernel security functions. The secure processing system includes two parallel subsystems, a red subsystem and a black subsystem. The red subsystem may communicate only with the kernel since this system transfers plain text data. The black subsystem may communicate with the red subsystem and also other processing systems for the transmission of cypher text data. The security kernel is a single standard interface for tasks associated with the red and black subsystems for communicating in a secure manner with one another and with other processing systems. Various security services are provided to red and black subsystem applications by a single security kernel.

Abstract: A cooperating communications system in which at least two stations and a connecting communications link form a cooperative communicating loop. Each station contains a plurality of amplification stages, which stages are selected by binary input messages. An oscillating loop is established in response to the selection of a predetermined number of amplification stages. The oscillating loop permits the occurrence of secure communication between the two stations.

Abstract: The present invention provides an intrusion barrier for protecting against mechanical or chemical intrusion into an electronic assembly, especially one containing volatile memory. It includes a screen material surrounding the electronic assembly which screen material has formed thereon fine conductive lines in close proximity to each other. The lines are formed of conductive particles of material dispersed in a solidified matrix of a material which looses its mechanical integrity when removed from the screen. An electrical supply and signal detection circuit is provided which generates an output signal responsive to a given change in resistance of the conductive lines, such that if the resistance changes are a result of a mechanical or chemical attack, a signal is generated which can cause the erasure of the volatile memory.

Abstract: The ultrasound detector for a thin film includes an ultrasound transmitter and an ultrasound receiver. It is generally known that a plastic film introduced into a sound field attenuates the field to a greater or lesser degree. A sound wave of a frequency of e.g. 40 kHz has a wave length of approximately 9 mm in air. When a plastic film of a thickness of, e.g., 0.50-0.10 mm is introduced, the sound field is typically attenuated with 6-20 dB. The the ultrasound detector is formed as a resonator, and the distance between the transmitter and the receiver corresponds substantially to an integral multiple of one half of a wave length. As a result, the obtained sound field is stronger than previously and the attenuation caused by a plastic film between the transmitter and the receiver is higher than previously. Furthermore, the ultrasound frequency is scanned for taking tolerances, such as changes in temperature and humidity of air into account.

Abstract: Antenna, in particular for a sonar, allowing to form directional channels by feeding the transducers by a reduced number of sources by means of an interpolation network that permits to maintain to a low level the image lobes in spite of this reduction of the number of sources.

Abstract: A system for reducing sidelobes of phased array antenna systems is performed by tapering the current amplitide of edge elements in the array while maintaining a full uniform current to the center elements in the array. Tapering may be adjusted with variable impedance devices until optimum sidelobe reduction is achieved.