Patents Examined by Todd DeBoer
  • Patent number: 5488534
    Abstract: A transient voltage surge suppressor (100) for use in a single or poly-phase power distribution network to protect equipment supplied power from the network from damage caused by line surges or transients. A plurality of surge suppression assemblies (102A-102G) each of which includes a plurality of semiconductors (114) connected in parallel and a fuse wire (118) connected in series with each semiconductor. Each assembly is mounted on a separate circuit board (126A-126G). A fault detection circuit (104) in each assembly includes both a sensor (132A-132G) for sensing when a semiconductor in one of the surge suppression assemblies fails, or when a fuse wire in one of the assemblies clears, and a circuit (152) for providing a visual indication thereof. The fault detector is mounted on a separate circuit board (131).
    Type: Grant
    Filed: August 19, 1993
    Date of Patent: January 30, 1996
    Assignee: Emerson Electric Co.
    Inventors: C. Peter Rau, Thomas T. Hitch
  • Patent number: 5485340
    Abstract: An electrical supply safety plug that prevents power from a mains electrical supply from being accessible to an electrical appliance unless the electrical supply safety plug is properly engaged with the socket outlets and the appliance is turned on. The electrical supply safety plug disconnects the electrical appliance in the event of current imbalance.
    Type: Grant
    Filed: February 19, 1993
    Date of Patent: January 16, 1996
    Assignee: Aditan, Inc.
    Inventor: Shimon Avitan
  • Patent number: 5483408
    Abstract: A circuit interrupting device provides for operator selection of protection parameters for a neutral conductor separate from operator selected phase protection.
    Type: Grant
    Filed: March 25, 1994
    Date of Patent: January 9, 1996
    Assignee: Eaton Corporation
    Inventors: Joseph J. Matsko, Joseph C. Engel, Alan B. Shimp
  • Patent number: 5483404
    Abstract: A semiconductor integrated circuit allows no through-current to flow to voltage-driven-type power control devices of an external circuit even when the grounding terminals are opened, thereby protecting the devices from breakdown.
    Type: Grant
    Filed: March 13, 1995
    Date of Patent: January 9, 1996
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Toshiya Nakano
  • Patent number: 5479314
    Abstract: In a circuit arrangement having a semiconductor switch for the switching of a load, in particular of a setting member in manual or automatic control devices, as a function of a switch signal which is fed, a device for disconnect in the event of a short-circuit being adapted to be controlled by a current sensor over a filter, the device for the disconnecting can furthermore be actuated via a logic circuit by the switch signal and by an output signal of a detector for an overvoltage at the semiconductor switch in such a manner that disconnect takes place when an overvoltage is present and the switch signal assumes a level intended for connection.
    Type: Grant
    Filed: August 8, 1994
    Date of Patent: December 26, 1995
    Assignee: VDO Adolf Schindling AG
    Inventor: Walter Kares
  • Patent number: 5477407
    Abstract: An input protection circuit includes a conductor pattern extending from a first end connected to an input pad to a second end connected to an integrated circuit, first and second, mutually separated ground patterns disposed at both sides of the conductor pattern with a separation therefrom, a first gate pattern provided on a gap between the conductor pattern and the first ground pattern, and a second gate pattern provided on a gap between the conductor pattern and the second ground pattern, wherein the conductor pattern, the first ground pattern and the first gate pattern form a first transistor extending continuously from the first end to the second end of the conductor pattern at a first side of the conductor pattern, and wherein the conductor pattern, the second ground pattern and the second gate pattern form a second transistor extending continuously from the first end to the second end of the conductor pattern at a second side of the conductor pattern.
    Type: Grant
    Filed: August 30, 1994
    Date of Patent: December 19, 1995
    Assignees: Fujitsu Limited, Fujitsu VLSI Limited
    Inventors: Isamu Kobayashi, Yasunori Murase
  • Patent number: 5477409
    Abstract: An integrated circuit system includes an integrated circuit with a heat sink assembly including a fusible core. In the event that power dissipation by the integrated circuit threatens to exceed its safe operating range, the fusible core melts, absorbing the heat of fusion and delaying further temperature increases. A motor is repeatedly activated to attempt to rotate a shaft within the fusible core. When the core is solid, the shaft cannot be turned, but once it melts the shaft turns. The shafts motion is detected and used to trigger a reduction in the drive clock frequency of the integrated circuit. This reduces power consumption and dissipation until the integrated circuit cools and the heat sink core solidifies.
    Type: Grant
    Filed: November 24, 1993
    Date of Patent: December 19, 1995
    Assignee: VLSI Technology Inc.
    Inventor: Anthony Sayka
  • Patent number: 5477411
    Abstract: A pulse motor control device comprises, as additional component parts, a power-off detecting circuit, and a turning-off circuit. The power-off detecting circuit detects, when a driving switch is turned off, a dropping of a voltage supplied to a driving circuit and outputs a power-off detection signal. The turning-off circuit includes diodes and a control resistor. The diodes are connected respectively to control terminals of all driving transistors of the driving circuit. When the control transistor is turned on in response to the power-off detection signal, voltages of control terminals of the driving transistors are dropped to the ground level through the diodes, thereby turning off the driving transistors.
    Type: Grant
    Filed: December 5, 1994
    Date of Patent: December 19, 1995
    Assignee: Zexel Corporation
    Inventor: Hiroshi Ohsawa
  • Patent number: 5473499
    Abstract: A method of connecting an IC card to a motherboard involves first connecting the ground busses, then the power busses and finally the general signal busses. When the power busses are connected, a low current is allowed to flow initially, then, a predetermined period of time is allowed to elapse for equalization of IC card and motherboard voltages, then a full current is allowed to flow. A method of disconnecting an IC card from a motherboard involves first disconnecting the general signal busses, then the power busses and finally the ground busses.
    Type: Grant
    Filed: June 30, 1993
    Date of Patent: December 5, 1995
    Assignee: Harris Corporation
    Inventor: Steven P. Weir
  • Patent number: 5473495
    Abstract: A combination load controller for controlling application of power to a load such as a motor, has an input terminal coupleable to a power source, and an output terminal coupleable to a load. A conductive polymer and a protective, electromagnetic switch are disposed along a current path between the input and output terminals. The conductive polymer has a relatively low electrical resistance during conduction at nominal currents. The resistance of the conductive polymer increases substantially promptly upon conduction of excessive current, e.g., due to a short-circuit. In this manner the load is protected from even short bursts of excessively high, short-circuit current by the insertion of additional series resistance by the conductive polymer. The electromagnetic switch protects the line and load by opening the current path. The switch includes a current or voltage sensor coupled to a logic controller that opens the switch if over-current or under-voltage conditions persist for a predetermined period.
    Type: Grant
    Filed: December 3, 1993
    Date of Patent: December 5, 1995
    Assignee: Eaton Corporation
    Inventor: James A. Bauer
  • Patent number: 5471359
    Abstract: A solid state sensing and control device for monitoring either D.C. or A.C. currents of one or more phases that is ideal for protecting motors and other A.C. loads. The programmable monitoring device can detect an overload or an emergency and virtually instantaneously interrupt motor current to prevent burnout and reduce the danger of fire. High current conductors leading to the motor (or other load) are mechanically routed through current sensing coils. An LCD visible through the cabinet top displays menu information and data. Programming and command control are initiated by pressing one or more of a plurality of light buttons disposed beneath the cabinet that comprise OPIC transmitter-receiver pairs. An instrumentation amplifier is associated with each sensing coil, and the circuitry preferably outputs two amplified analog signals from each coil, the amplitude of the first being proportionately higher than the second.
    Type: Grant
    Filed: February 25, 1993
    Date of Patent: November 28, 1995
    Assignee: Impco Inc.
    Inventors: Elmer J. Simpson, Sergio Picado
  • Patent number: 5467240
    Abstract: The present invention provides a general purpose driver circuit. The driver circuit is connected to a load. The driver circuit includes a controller for producing a control signal indicative of a desired output current. The driver circuit generates an output current having a magnitude responsive to the magnitude of the control signal. The driver circuit produces a system voltage feedback signal and an output voltage feedback signal and responsively performs output load condition diagnostics.
    Type: Grant
    Filed: September 30, 1993
    Date of Patent: November 14, 1995
    Assignee: Caterpillar Inc.
    Inventors: Gregory L. Williamson, Mark R. Hawkins, William J. Tate
  • Patent number: 5465188
    Abstract: A circuit protection arrangement that is intended to be series connected in a line of an electrical circuit comprises a transistor switch 1 that controls the circuit current and has a control input, and a control arrangement that controls the voltage of the control input of the switch. The control arrangement comprises a comparator circuit 3 that compares a fraction of the voltage across the switch 1 with a reference voltage, for example supplied by a Zener diode or bandgap diode, and opens the switch if the fraction is greater than the reference voltage. The comparator circuit is powered by the voltage drop in the line across the switch so that the arrangement can be formed as a two-terminal device that requires no external power source.The arrangement has the advantage that it exhibits a relatively small variation in performance with respect to temperature variations.
    Type: Grant
    Filed: June 10, 1993
    Date of Patent: November 7, 1995
    Assignee: Raychem Limited
    Inventors: Dennis M. Pryor, Michael Challis
  • Patent number: 5465189
    Abstract: A new semiconductor controlled rectifier which may be used to provide on-chip protection against ESD stress applied at the input, output, power supply pins or between any arbitrary pair of pins of an integrated circuit is disclosed. The structure which has the lowest breakdown voltage for a given technology is incorporated into the SCR enabling a SCR trigger voltage determined by the lowest breakdown-structure.
    Type: Grant
    Filed: August 12, 1994
    Date of Patent: November 7, 1995
    Assignee: Texas Instruments Incorporated
    Inventors: Thomas L. Polgreen, Amitava Chatterjee, Ping Yang
  • Patent number: 5463520
    Abstract: An integrated circuit obtains improved ESD protection by way of a shunt protection circuit having a trigger level that exhibits a hysteresis effect with respect to voltage applied to the bondpads. The hysteresis is obtained by a string of voltage dropping transistors that produce a trigger voltage level at an intermediate node, and a shorting transistor that effectively removes at least one transistor from the string. In a typical case, a PNP bipolar transistor serves as the protective device in the circuit to carry the ESD current from the bondpads. An illustrative embodiment with p-channel voltage dropping transistors and an n-channel shorting transistor is shown, along with additional capacitive boost circuitry for speeding up circuit operation. In this manner, a high peak ESD current can be carried while ensuring non-conduction of the protection circuit for normal operating voltages, and also for voltages slightly in excess of normal power supply voltages.
    Type: Grant
    Filed: May 9, 1994
    Date of Patent: October 31, 1995
    Assignee: AT&T IPM Corp.
    Inventor: Dale H. Nelson
  • Patent number: 5461531
    Abstract: A controller apparatus for an electric vehicle includes a power supply, a power converting section for converting power supplied from the power supply, a motor which receives an output from the power converting section to drive the electric vehicle; an accelerator opening detector for detecting an accelerator opening; a controller section for controlling said power converting section in response to a detected output from said accelerator opening detector; a current detector for detecting the current supplied to the motor from the power supply; and failure decider for deciding that the controller suffers a failure when the output from the current detector is not smaller than the reference value previously determined in accordance with the accelerator opening, thereby stopping the drive of the motor. In such a structure, the torque not smaller than that required by a driver is produced so that it is possible to prevent the electric vehicle from running away.
    Type: Grant
    Filed: May 19, 1994
    Date of Patent: October 24, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Eiji Tuchiya, Seiji Wataya, Masahiro Inoue
  • Patent number: 5459630
    Abstract: Ground fault trip units for circuit breakers are tested by a passive test circuit which includes a test conductor passing through the current transformer sensing coil(s), and a test switch which selectively connects the test conductor in a loop which simulates a neutral-to-ground fault. In a dormant oscillator ground fault test circuit, the test conductor loop passes through both sensing coils. When the neutral-to-ground detector is combined with a sputtering are fault detector sharing a common sensing coil, testing of all the components is accomplished by adding an additional test circuit which injects pulses derived from the line conductor into the sensing coil secondary, or which alternatively, connects a capacitor charged from a DC supply across the sensing coil secondary. Either of these alternative test circuits generates the successive events needed to produce a sputtering arc trip.
    Type: Grant
    Filed: September 15, 1993
    Date of Patent: October 17, 1995
    Assignee: Eaton Corporation
    Inventors: Raymond W. MacKenzie, John A. Wafer
  • Patent number: 5457591
    Abstract: In a current overload protection circuit, a full wave rectifier bridge circuit is connected between an AC or DC power source to supply AC or DC power to a load through the output circuit of a solid-state relay. A current sensing resistor is connected across the DC terminals of the bridge circuit to sense the magnitude of the current flowing through the load. When an overload fault occurs, the voltage developed across the current sensing resistor will trigger a shunt regulator to turn on an optical isolation circuit, which upon being turned on will discharge a capacitor in an RC timing circuit. The discharge of the capacitor and the RC timing circuit triggers a Schmidt trigger circuit, which cuts off current flow to the input circuit of the solid-state relay, thereby cutting off current to the load. The shunt regulator then turns off de-energizing the optical isolator which, upon being de-energized, causes the current discharge path of the capacitor to be interrupted.
    Type: Grant
    Filed: January 12, 1995
    Date of Patent: October 10, 1995
    Assignee: Loral Federal Systems Company
    Inventors: Rene D. Mock, Scott C. Willis
  • Patent number: 5455731
    Abstract: A solid state power controller is automatically reset if an overload trip occurs during a start-up delay period. If an overload trip occurs during load starting, the SSPC remains tripped for a reset delay period, and thereafter the SSPC is automatically reset, thereby allowing the starting process to continue by heating a lamp filament, accelerating a motor, etc., without indicating a system fault to an operator. At the expiration of the start-up delay period, the SSPC no longer automatically resets in response to an overload condition.
    Type: Grant
    Filed: October 28, 1994
    Date of Patent: October 3, 1995
    Assignee: United Technologies Corporation
    Inventor: Gerald W. Parkinson
  • Patent number: 5453900
    Abstract: A protective circuit configuration for a power transistor having a load circuit and a control terminal includes an inductive load connected into the load circuit of the power transistor. A further transistor has a control terminal and has a load path connected between the load path and the control terminal of the power transistor. A control device is supplied by a voltage applied to the load path of the power transistor. The control device generates a control signal from the voltage applied to the load path of the power transistor for delivering the control signal to the control terminal of the further transistor.
    Type: Grant
    Filed: March 9, 1993
    Date of Patent: September 26, 1995
    Assignee: Siemens Aktiengesellschaft
    Inventor: Martin Feldtkeller