Patents Examined by Todd R. Swann
  • Patent number: 6202202
    Abstract: A pointer analysis by type inference for a computer program ith structured memory objects and potentially inconsistent memory object accesses helps approximate run-time store usage for the program. The analysis represents locations for the program with types describing access patterns for the represented locations based on how the locations are accessed in the program. The analysis describes access patterns for structured memory objects, elements of structured memory objects, and memory objects accessed in inconsistent manners in the program. The analysis identifies store usages described by the program and determines whether the location(s) and/or function(s) affected by the identified store usages are well-typed under typing constraints. If the identified store usages are not well-typed, the analysis modifies types for location(s) and/or function(s) affected by the identified store usages as necessary so the store usages are well-typed.
    Type: Grant
    Filed: September 24, 1996
    Date of Patent: March 13, 2001
    Assignee: Microsoft Corporation
    Inventor: Bjarne Steensgaard
  • Patent number: 6189099
    Abstract: A computer security system is described. Each authorized user is provided with a key device that holds a serial number and an encryption key. A validation record stored on the computer's hard disk contains an unencrypted key device serial number and an encrypted hard disk serial number. The user connects the key device to the computer prior to power-up or reset. A program implements a user validation procedure. The procedure permits entry past a first security level if the key device serial number matches the unencrypted number in the validation record. If the first level validation is successful, the procedure then uses the encryption key to decrypt the hard drive serial number found in the stored validation record. The procedure permits entry past a second security level if the validation record is properly decrypted and the hard disk serial number matches the decrypted number. Failure in any step powers down the computer and renders it useless.
    Type: Grant
    Filed: February 11, 1998
    Date of Patent: February 13, 2001
    Assignee: Durango Corporation
    Inventors: William N. Rallis, Yaacov Behar
  • Patent number: 6035397
    Abstract: The invention relates to a process for data certification as well as to the system implementing the certification process.The certification of the data is performed by scrambling.An authority independent of the entity which controls the data source and of the user(s) for which these data are intended, scrambles the data with the aid of control words and encrypts the control words with the aid of an encryption algorithm with key K.So that a user or the users can descramble the data scrambled by the independent authority, a certification verification device containing the encryption key K is supplied to the user or users under the control of the independent authority.The certification process and the system associated therewith apply more particularly to conditional-access systems.
    Type: Grant
    Filed: November 14, 1997
    Date of Patent: March 7, 2000
    Assignee: Thomson Multimedia, S.A.
    Inventors: Arnaldo Campinos, Louis Gregoire, Jean-Marie Vigneron
  • Patent number: 5867469
    Abstract: A laser light detect/emit package 3 and a biaxial drive portion 5 for driving the objective lens 4 are supported on a wiring board 1 having wiring patterns 2a and 2b to electrically connect them to the wiring patterns 2a and 2b. Packaged in the laser light detect/emit package 3 are a laser coupler 11 having an optical prism 15 and a laser chip 16 formed on a photo diode IC 14 including photo diodes 12 and 13 for detecting optical signals. In lieu of the laser light detect/emit package 3, an auxiliary wiring board supporting the laser coupler 11 may be inserted and held in a recess formed in the wiring board 1.
    Type: Grant
    Filed: August 27, 1997
    Date of Patent: February 2, 1999
    Assignee: Sony Corporation
    Inventors: Kiyoshi Tanaka, Chiaki Kojima
  • Patent number: 5842035
    Abstract: A parallel computer comprising a plurality of processor elements and a network interconnecting the same, wherein each of the plurality of processor elements includes: a memory unit including a first area and a second area, the first area storing a program and a data portion allocated to the processor element, the second area having a smaller capacity than the first area and storing working data temporarily; a first data transferring unit for performing a first data transfer, whereby data necessary for an operation are transferred to the second area from the first areas of the other processor elements via the network to form a new data portion therein; a processor for performing a first operation, whereby the data portion in the first area is processed as per program and an operation result is restored into the first area, and for performing a second operation, whereby the new data portion in the second area is processed as per program and an operation result is restored into the second area; and a second data
    Type: Grant
    Filed: March 24, 1995
    Date of Patent: November 24, 1998
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Junji Nishikawa