Abstract: A video interface system and method produce an interlaced video signal from a noninterlaced graphics signal produced by a computer. The video interface system receives a digitized noninterlaced graphics signal directly from the graphics system of the computer and converts the graphics signal into an analog interlaced video signal. The noninterlaced graphics signal is characterized by a higher resolution and higher frequency than the analog interlaced video signal. In the preferred embodiment, the video interface is connected to a decoder within the graphics system. The decoder generates and combines timing signals with pixel values from a frame buffer to produce a noninterlaced graphics signal.
Abstract: A timing control device for liquid crystal display including odd data driver ICs and even data driver ICs, both group of ICs being arrayed serially on one part of the liquid crystal display panel, color signals being converted to appear alternately at the odd data and the even-data according to a number of channels of driver IC, the odd data and the even data being transmitted to the odd data driver ICs and the even data driver ICs respectively, each one of the odd data driver ICs and the even data driver ICs simultaneously operating the liquid crystal display, effecting driver frequency to be reduced, the color signal being similar type to a single bank type, enabling the data driver ICs to be arranged on one face of the liquid crystal display panel, effecting compact design of the data driver ICs.
Abstract: A plasma display having a quartet type pixel structure provides a high grade and excellent picture quality picture and maintains good white balance and excellent intensity levels. The plasma display comprises a reference circuit .phi. for outputting a control signal based on the least significant bit of a digitized green video signal and a timing signal and an arithmetic circuit 8 for performing an arithmetic operation on the output of the reference circuit. As a result of this arrangement, the least significant bit information, that was lost by halving the green signal value to maintain the white balance is incorporated in the halved green signal based on a timing signal, thereby realizing 256 intensity levels without degrading the halftone in the video picture.
September 14, 1995
Date of Patent:
January 5, 1999
Matsushita Electric Industrial Co., Ltd.
Abstract: A triple-electrode planar display capable of achieving further power saving has been disclosed. A drive unit is dedicated to a planar display having a display panel in which cells being arranged in the form of a matrix and having a memory function and discharge glow function are formed, in which one of each pair of electrodes on the same substrate which are responsible for discharge glow is a common electrode connected in common. The drive unit includes a common electrode drive circuit for applying an alternating voltage to the common electrode, and a power save circuit that when the common electrode is changed from a high potential to a low potential, restores and accumulates power applied to the common electrode, and that when the common electrode is changed from the high potential to the low potential, applies accumulated power to the common electrode.
Abstract: A waveform display signal generating apparatus is provided in which a result of calculation processing of digital data in a CPU is visualized and is converted into a television video signal for display on a screen of a television receiver under production. The apparatus verifies digital data processing on a screen of a television receiver under production and provides a simplified verification system. A signal digitized at an A/D converter is digitally signal processed at a data processing circuit. The data under digital signal processing is supplied to a CPU through a CPU interface circuit, is calculated for converting into a graph and then the converted data is stored in a RAM in a form of a bit map data. The bit map data is converted into an analog signal at a D/A converter, is further converted into a television video signal at a television encoder and then is supplied from a video signal output terminal to a video circuit of a television receiver under production.
April 10, 1996
Date of Patent:
October 27, 1998
Matsushita Electric Industrial Co., Ltd.
Abstract: A mouse for a computer having a longitudinal slot formed in a side wall of the mouse body through which the mouse cable passes to the computer. The guide slot is notched along one edge with rounded grooves for removably receiving a connector of the mouse cable and thereby selectively adjusting the connected position of the cable at the side wall of the mouse in accordance with the size and configuration of the hand of a user. A pointer in the form of an arrow extends forwardly at the front of the mouse to enable the mouse to precisely follow an original which is to be copied on a screen of the computer.
Abstract: The present invention concerns a relative manipulated variable input device which is capable of controlling the cursor movement in correspondence to the direction and amount of tilt of a control button and controlling the speed of the cursor movement in accordance with the force applied to the control button as well. Output data is generated using relative position data calculated from the difference between a pressed position and a reference position and a contact resistance value r.sub.p. The output data, which represents the direction and amount of tilt of the control button, is output in accordance with the force applied to the control button. The relative position data represents the direction and amount of tilt of the control button and the output data is produced based on the relative data. Hence, the cursor movement can be controlled by the direction and amount of tilt of the control button, and by changing the force exerted on the control button to change the contact resistance value r.sub.
Abstract: A digital data line driver includes a data input circuit for fetching data in response to an external clock, a reference voltage supply circuit having reference voltages corresponding to a plurality of gray-scale levels, a selector circuit for selecting a specified reference voltage representing the data from among those of the reference power supply circuit, and an output circuit for outputting the reference voltage selected by the selector circuit as display data onto data lines. The data input circuit and output circuit have a data-crossing function for switching data between adjoining channels of the data lines according to an external data switching control signal. Owing to this configuration, deterioration of liquid crystal can be prevented and a better display can be attained with suppressed flickers. At the same time, the picture-frame space can be reduced.