Patents Examined by Tsz Kit Chiu
  • Patent number: 7368767
    Abstract: A standard cell is read from a library and automatic layout wiring is performed, thereby configuring a circuit. Next, each cell column in the configured circuit is searched for an empty region. In the empty region in the cell column searched for, a spacer cell or a filler cell is placed. At this time, using the spacer cell or filler cell, the well potential of the standard cells in the cell column is fixed.
    Type: Grant
    Filed: March 24, 2005
    Date of Patent: May 6, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Kinoshita, Yasuhito Itaka, Takeshi Sugahara
  • Patent number: 7239016
    Abstract: A semiconductor device includes a heat generation element; a bonding member; first and second heat radiation plates disposed on first and second sides of the heat generation element through the bonding member; a heat radiation block disposed between the first heat radiation plate and the heat generation element through the bonding member; and a resin mold. The heat radiation block has a thickness in a range between 0.5 mm and 1.5 mm. The semiconductor device has high reliability of the bonding member.
    Type: Grant
    Filed: July 22, 2004
    Date of Patent: July 3, 2007
    Assignee: Denso Corporation
    Inventors: Naohiko Hirano, Nobuyuki Kato, Kuniaki Mamitsu, Yoshimi Nakase
  • Patent number: 7220999
    Abstract: An electro-optical device is provided that includes a protection layer formed on a first substrate leaving a region of the first substrate region exposed; a first electrode formed on the protection layer; a first inter-substrate conduction unit formed on the protection layer and electrically connected to the first electrode; a second substrate opposing the first substrate and having a second electrode formed thereon; a second inter-substrate conduction unit formed on the second substrate and electrically connected to the second electrode; and a conductive member interposed between the first inter-substrate conduction unit and the second inter-substrate conduction unit to electrically connect both units together. The electro-optical device further includes a sealant that contains the conductive member bonding the first substrate and the second substrate together by extending over the protection layer and the exposed region where the protection layer is not formed.
    Type: Grant
    Filed: April 1, 2004
    Date of Patent: May 22, 2007
    Assignee: Seiko Epson Corporation
    Inventors: Yoshikatsu Imazeki, Kazuyoshi Sakai
  • Patent number: 7217968
    Abstract: A novel image sensor cell structure and method of manufacture. The imaging sensor comprises a substrate, a gate comprising a dielectric layer and gate conductor formed on the dielectric layer, a collection well layer of a first conductivity type formed below a surface of the substrate adjacent a first side of the gate conductor, a pinning layer of a second conductivity type formed atop the collection well at the substrate surface, and a diffusion region of a first conductivity type formed adjacent a second side of the gate conductor, the gate conductor forming a channel region between the collection well layer and the diffusion region. Part of the gate conductor bottom is recessed below the surface of the substrate. Preferably, a portion of the gate conductor is recessed at or below a bottom surface of the pinning layer to a depth such that the collection well intersects the channel region.
    Type: Grant
    Filed: December 15, 2004
    Date of Patent: May 15, 2007
    Assignee: International Business Machines Corporation
    Inventors: James W. Adkisson, John Ellis-Monaghan, Mark D. Jaffe, Jerome B. Lasky
  • Patent number: 7161248
    Abstract: A first area, a ring shape second area surrounding the first area, and a third area surrounding the second area are defined on the surface of a support substrate. A first wiring layer is disposed above the support substrate. A wiring is formed in the third area, dummy patterns being formed in the second area, and conductive patterns are not formed in the first area. A functional element is disposed above the first wiring layer and in the first area.
    Type: Grant
    Filed: July 26, 2004
    Date of Patent: January 9, 2007
    Assignee: Fujitsu Limited
    Inventors: Toshiyuki Karasawa, Satoshi Otsuka
  • Patent number: 7135712
    Abstract: An electroluminescent device (13), such as a light emitting diode, which has a light-reflecting surface (10) causing undesirable reflection of ambient light incident on the device is provided with a combination of a reflective circular polarizer (17) and an absorbing circular polarizer (23) to suppress the undesirable reflection of ambient light thus improving the contrast of the device when used under high intensity ambient lighting conditions while maintaining a satisfactory brightness. The reflection band of the reflective circular polarizer regions (17?) of the reflective circular polarizer (17) are preferably tuned to the corresponding emission band of the luminescent regions (9?) of the electroluminescent device to further increase the contrast of the device while substantially maintaining the same brightness.
    Type: Grant
    Filed: May 20, 2003
    Date of Patent: November 14, 2006
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Dirk Jan Broer, Henricus Franciscus Johannus Jacobus Van Tongeren, Robert Jan Visser