Patents Examined by Tu Ho
  • Patent number: 7586201
    Abstract: In a semiconductor device having wirings, a wiring modeling technique according to the present invention comprises the steps of selecting an arbitrary region of the semiconductor device; calculating a wiring area ratio of the wirings to the region; and determining the region and the wiring area ratio to model the cross-sectional profile of a target wiring located in the middle of the region.
    Type: Grant
    Filed: September 24, 2002
    Date of Patent: September 8, 2009
    Assignee: NEC Electronics Corporation
    Inventor: Kenta Yamada