Abstract: Embodiments for providing compare and swap (CAS) functionality to key value storage to allow multi-threaded applications to share storage devices and synchronize multiple concurrent threads or processes. A key-value application programming interface (API) is modified to include a CAS API in addition to the standard Put and Get APIs. The CAS function uses a key, expected old value, and new value to compare and swap an existing key value only if its current value equals the expected old value. Hash values of the key value and expected old value may be used by the CAS function to improve performance and reduce bandwidth.

Abstract: Systems and methods are provided for seamless and automatic upgrade of access points in a facility with minimal disruption, particularly, for important users of a network. The access points may be ranked, and the rankings may be aggregated to identify a sub-region of the facility with the lowest ranked access points. Various sub-sets of the access points in the identified sub-region can be updated separately so that spatial coverage by the other sub-sets maintains continuous access within the sub-region during the updates. Updates to later sub-sets and/or sub-regions can be performed contingent on the success of the earlier updates. In this way, updates can be verified on access points used by lower-priority users such as guest users of the network to avoid disruption of access to more important users such as executives or safety workers on the network.

Abstract: There is described a method for Java Card application memory footprint optimization which relies on the separation in advance of the code related to the personalization from the rest of the code. It allows this code to perform the personalization of an application installed from a main package while being itself included and installed from a separated package dedicated to the personalization, namely the Card Personalization Specifications (CPS) package. This way, the CPS package and all the code inherent to the personalization can be removed once all the personalization steps have been completed.

Abstract: A computer-implemented method, apparatus, and computer program product for scheduling a process to run on a processor. A determination is made whether a process running on a processor is making an input/output operation system call. The process is de-scheduled from running on the processor in response to a determination that the process is making an input/output operation system call. The process is allowed to continue running on the processor in response to a determination that the process is not making an input/output system call.

Abstract: Systems, methods, and software described herein facilitate servicing of data requests based on quality of service assigned to processing jobs. In one example, a method of prioritizing data requests in a computing system based on quality of service includes identifying a plurality of data requests from a plurality of processing jobs. The method further includes prioritizing the plurality of data requests based on a quality of service assessed to each of the plurality of processing jobs, and assigning cache memory in the computing system to each of the plurality of data requests based on the prioritization.

Abstract: An apparatus (2) with multiple processing elements (4, 6, 8) has shared transactional processing resources (10, 50, 75) for supporting processing of transactions, which comprise operations performed speculatively following a transaction start event whose results are committed following a transaction end event. The transactional processing resources may have a significant overhead and sharing these between the processing elements helps reduce energy consumption and circuit area.

Abstract: In one implementation, a method of sharing a physical device between multiple virtual machines is provided. The method includes receiving, from a first virtual machine, a request to access a physical device of a computing device. The method also includes determining, by a processing device, whether the physical device of the computing device is available in view of power state information associated with the physical device of the computing device. The method further includes in response to determining that the physical device of the computing device is available, assigning the physical device to the first virtual machine.

Abstract: One embodiment provides for a computer-implemented method comprising instantiating a synchronization primitive to control access to a resource, acquiring the synchronization primitive at a first thread, the first thread having a first priority, associating a turnstile with the synchronization primitive, setting an inheritor of the turnstile to the first thread, attempting to acquire the synchronization primitive at a second thread while the synchronization primitive is held by the first thread, the second thread having a second priority, adding the second thread to a wait queue of the turnstile; and in response to determining that the second priority is higher than the first priority, increasing the priority of the first thread to the second priority.

Abstract: Combining specifications of dataflow graphs includes receiving: a first dataflow graph specification that specifies two or more components connected by links representing flows of data, and a second dataflow graph specification that specifies at least one component, and at least one sub-graph interface. The sub-graph interface includes at least one flow junction representing a connection between: (1) a flow of data outside the sub-graph interface, and (2) a flow of data inside the sub-graph interface. The method includes processing information including the first dataflow graph specification and the second dataflow graph specification, to generate a combined dataflow graph specification, including: identifying an association between the sub-graph interface and the first dataflow graph specification, for at least a first flow junction, determining a direction associated with transferring a value of a descriptor, and transferring a value of a descriptor according to the determined direction.

Abstract: A pneumatically actuated computer input device comprises an input device circuit member having a hollow body, at least one switch member within the hollow body adapted to send electronic signals to a computer terminal, and a pneumatic actuator within the hollow body adapted to be inflated and press against and activate the at least one switch member. A pneumatic hose connected at a distal end to the pneumatic actuator and extending outward from the hollow body at a predetermined length and adapted to supply air thereto, and a foot pedal connected to the pneumatic hose at an opposite end from the distal end and adapted to control the air supply through the pneumatic hose and to the pneumatic actuator, such that when the foot pedal is pressed the pneumatic actuator is filled with air, expands, and presses against the at least one switch member which then sends an electronic signal to the computer terminal.

Abstract: A method includes obtaining feature generation code from, which is configured to determine features relating to input data. The method further includes obtaining data grouping code, which is configured to generate training data by determining a plurality of data groupings for the features relating to the input data. The method further includes obtaining modeling code, which is derived at least in part by applying one or more machine learning algorithms to the training data. The method further includes applying a model wrapper code to the feature generation code, the data grouping code, and the modeling code to generate a model wrapper and deploying the model wrapper such that the model wrapper may receive a first application programming interface (API) call including an input data value, determine a score relating to the input data value, and send a second API call including the score in response to the first API call.

Abstract: A device may connect to a physical device. A device may obtain a device description document relating to the physical device based on connecting to the physical device. The device may parse the device description document to identify one or more components of the physical device. The device may select, from a repository of generic textual model components, one or more generic textual model components corresponding to the physical device based on parsing the device description. The device may generate, based on selecting the one or more generic textual model components, a device driver model element that includes the one or more generic textual model components. The device driver model element may be used to control the physical device or receive information from the physical device. The device may provide, via a user interface, information identifying the device driver model element.

Abstract: Technologies for secure I/O include a compute device, which further includes a processor, a memory, a trusted execution environment (TEE), one or more input/output (I/O) devices, and an I/O subsystem. The I/O subsystem includes a device memory access table (DMAT) programmed by the TEE to establish bindings between the TEE and one or more I/O devices that the TEE trusts and a memory ownership table (MOT) programmed by the TEE when a memory page is allocated to the TEE.

Abstract: Systems, apparatuses and methods may provide for technology that assigns a plurality of data portions associated with a workload to a plurality of cores, wherein each data portion from the plurality of data portions is only modifiable by a respective one of the plurality of cores. The technology may further pass a message between the plurality of cores to modify one or more of the data portions in response to an identification that the one or more of the data portions are unmodifiable by one or more of the plurality of cores.

Abstract: A simultaneous multi-threading (SMT) processor core capable of thread-based biasing with respect to execution resources. The SMT processor includes priority controller circuitry to determine a thread priority value for each of a plurality of threads to be executed by the SMT processor core and to generate a priority vector comprising the thread priority value of each of the plurality of threads. The SMT processor further includes thread selector circuitry to make execution cycle assignments of a pipeline by assigning to each of the plurality of threads a portion of the pipeline's execution cycles based on each thread's priority value in the priority vector. The thread selector circuitry is further to select, from the plurality of threads, tasks to be processed by the pipeline based on the execution cycle assignments.

Abstract: A method includes obtaining feature generation code from, which is configured to determine features relating to input data. The method further includes obtaining data grouping code, which is configured to generate training data by determining a plurality of data groupings for the features relating to the input data. The method further includes obtaining modeling code, which is derived at least in part by applying one or more machine learning algorithms to the training data. The method further includes applying a model wrapper code to the feature generation code, the data grouping code, and the modeling code to generate a model wrapper and deploying the model wrapper such that the model wrapper may receive a first application programming interface (API) call including an input data value, determine a score relating to the input data value, and send a second API call including the score in response to the first API call.

Abstract: Implementations detailed herein include description of a computer-implemented method to migrate a machine learning model from one accelerator portion (such as a portion of a graphical processor unit (GPU)) to a different accelerator portion. In some instances, a state of the first accelerator portion is persisted, the second accelerator portion is configured, the first accelerator portion is then detached from a client application instance, and at least a portion of an inference request is performed using the loaded at least a portion of the machine learning model on the second accelerator portion that had been configured.

Abstract: A method of determining whether a program corresponds to a new version of an application is disclosed. A key value corresponding to the program is determined. A program descriptor corresponding to the program is determined. The program descriptor comprises fields extracted from a program file associated with the program. One or more versions of an application having the same key value are identified. A program descriptor corresponding to each of the one or more versions of the application is identified. The program descriptor corresponding to each of the one or more versions of the application comprises fields extracted from a program file associated with the version of the application. The determination of whether the program corresponds to a new version of the identified application is based on comparing the program descriptor corresponding to the program against the program descriptors corresponding to the one or more versions of the identified application.

Abstract: Described embodiments provide systems and methods for stateless modification of operating system registry data across network boundaries. The system includes a processor coupled to memory and configured to execute instructions to receive, within a first network, a request to apply a modification to an operating system registry of a second device within a second network different from the first network. The processor queues data describing the requested modification, receives a polling request from the second device, and transmits, to the second device responsive to the polling request, the queued data describing the requested modification for the second device to apply to the operating system registry of the second device. For example, the requested modification may be to create a key, to create a value, to delete a key, or to delete a value.

Abstract: Described is a mechanism that provides the ability to reuse a portion of visual programming logic within an automation building tool. The programming logic may be represented as a directed acyclic graph (DAG) such that the nodes of the graph correspond to various operations and the edges of the graph correspond to the logic flow of the program. The mechanism may provide a new capability to reuse portions of the visual programming logic while adhering to the requirements of a DAG structure. For example, a user may copy a valid substructure of visual programming logic upon a validation the programming logic may be inserted into another portion of the DAG. Accordingly, the mechanism provides an efficient and user-friendly mechanism to reuse a portion of visual programming logic within an automation building tool.